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公开(公告)号：US07681063B2
公开(公告)日：2010-03-16
申请号：US11093554
申请日：2005-03-30
CPC分类号： H03L7/107 , H03L7/0814 , H03L7/091 , H03L7/093 , H04L7/033
摘要： A clock data recovery circuit includes a first circuit, a second circuit, and a third circuit. The first circuit is configured to receive data and a clock signal and to detect transitions in the data and provide a first signal based on the clock signal and the transitions in the data. The second circuit is configured to receive the first signal and provide a first shift signal based on the first signal. The third circuit is configured to receive the first shift signal, wherein the first circuit, the second circuit, and the third circuit are configured to form a first circuit loop and the third circuit is configured to disable the first circuit loop and shift the clock signal based on the first shift signal.
摘要翻译： 时钟数据恢复电路包括第一电路，第二电路和第三电路。 第一电路被配置为接收数据和时钟信号并且检测数据中的转变并且基于时钟信号和数据中的转换来提供第一信号。 第二电路被配置为接收第一信号并且基于第一信号提供第一移位信号。 第三电路被配置为接收第一移位信号，其中第一电路，第二电路和第三电路被配置为形成第一电路回路，并且第三电路被配置为禁用第一电路回路并且移位时钟信号 基于第一移位信号。
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公开(公告)号：US20060227914A1
公开(公告)日：2006-10-12
申请号：US11093554
申请日：2005-03-30
IPC分类号： H04L7/00
CPC分类号： H03L7/107 , H03L7/0814 , H03L7/091 , H03L7/093 , H04L7/033
摘要： A clock data recovery circuit includes a first circuit, a second circuit, and a third circuit. The first circuit is configured to receive data and a clock signal and to detect transitions in the data and provide a first signal based on the clock signal and the transitions in the data. The second circuit is configured to receive the first signal and provide a first shift signal based on the first signal. The third circuit is configured to receive the first shift signal, wherein the first circuit, the second circuit, and the third circuit are configured to form a first circuit loop and the third circuit is configured to disable the first circuit loop and shift the clock signal based on the first shift signal.
摘要翻译： 时钟数据恢复电路包括第一电路，第二电路和第三电路。 第一电路被配置为接收数据和时钟信号并且检测数据中的转变并且基于时钟信号和数据中的转换来提供第一信号。 第二电路被配置为接收第一信号并且基于第一信号提供第一移位信号。 第三电路被配置为接收第一移位信号，其中第一电路，第二电路和第三电路被配置为形成第一电路回路，并且第三电路被配置为禁用第一电路回路并且移位时钟信号 基于第一移位信号。
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公开(公告)号：US20050005184A1
公开(公告)日：2005-01-06
申请号：US10808145
申请日：2004-03-24
申请人： Paul Lindt
发明人： Paul Lindt
IPC分类号： G06F1/04 , G06F12/00 , G11C5/00 , G11C7/02 , G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4093 , G11C11/4096 , G11C29/02
CPC分类号： G11C7/1048 , G11C5/04 , G11C5/063 , G11C7/02 , G11C7/22 , G11C11/401 , G11C11/4076 , G11C11/4093 , G11C11/4096 , G11C29/02 , G11C29/023 , G11C29/025 , G11C29/028 , G11C29/50012 , G11C2207/2254
摘要： Method for measuring and compensating skews of data transmission lines connecting at least one data transmission device with a data reception device via a parallel data bus comprising for each data transmission line the following steps: measuring the relative time delay of the data transmission line by transmitting a determined sequence of measurement vectors (MV) each consisting of an alternating bit pattern via said data transmission line, wherein the bit alternation frequency is halfed with every transmitted measurement vector (MV); comparing the received measurement vectors (MV′) transmitted via said data transmission line with corresponding reference vectors (RV) stored in said data reception device; shifting the received measurement vectors by inserting data unit intervals (UI) until a received measurement vector (MV′) matches a corresponding reference vector (RV); calculating a relative skew of the data transmission line depending of the number of inserted data unit intervals (UI) with respect to a slowest data transmission line; and compensating the calculated relative skew of the data transmission line by means of delay elements switched in response to the calculated relative skew.
摘要翻译： 用于经由并行数据总线测量和补偿至少一个数据传输装置与数据接收装置的偏差的数据传输线的偏差的方法，所述并行数据总线包括针对每个数据传输线的以下步骤：通过发送数据传输线来测量数据传输线的相对时间延迟 确定每个由经由所述数据传输线的交替位图案组成的测量向量（MV）序列，其中所述位交替频率与每个发送的测量向量（MV）一半; 将经由所述数据传输线传输的所接收的测量矢量（MV'）与存储在所述数据接收装置中的对应的参考矢量（RV）进行比较; 通过插入数据单元间隔（UI）来移动所接收的测量向量，直到所接收的测量向量（MV'）与对应的参考矢量（RV）匹配为止; 根据插入的数据单元间隔（UI）相对于最慢的数据传输线的数量计算数据传输线的相对偏差; 以及通过响应于所计算的相对偏差而切换的延迟元件来补偿所计算的数据传输线的相对偏差。
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4.发明授权公开(公告)号：US07167936B2
公开(公告)日：2007-01-23
申请号：US10348421
申请日：2003-01-21
申请人： Paul Lindt
发明人： Paul Lindt
CPC分类号： H05K1/0248 , H05K1/181 , H05K2201/09236 , H05K2201/09418 , H05K2201/10689 , Y02P70/611
摘要： Circuit board having a plurality of bus lines (6), which run on the circuit board (1) essentially parallel to a preferred direction of the circuit board (1), and having at least one integrated circuit (3) for the high-speed data processing of data, which integrated circuit is arranged on the circuit board (1), is integrated in a housing (4) having a plurality of housing sides (5) and has a plurality of parallel interfaces for connection to the bus lines (6), in which case the housing sides (5) of the integrated circuits (3) are oriented at an inclination with respect to the preferred direction of the circuit board (2).
摘要翻译： 具有多个总线（6）的电路板，其基本上平行于电路板（1）的优选方向在电路板（1）上延伸，并且具有用于高速的至少一个集成电路（3） 该集成电路布置在电路板（1）上的数据的数据处理集成在具有多个壳体侧面（5）的壳体（4）中，并且具有用于连接到总线（6）的多个并行接口 ），在这种情况下，集成电路（3）的壳体侧（5）相对于电路板（2）的优选方向倾斜。
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公开(公告)号：US20070147563A1
公开(公告)日：2007-06-28
申请号：US11644084
申请日：2006-12-22
申请人： Michael Brunnert , Paul Lindt
发明人： Michael Brunnert , Paul Lindt
IPC分类号： H04L7/00
CPC分类号： H04L7/0008
摘要： A method of synchronization of a digital circuit includes selecting a first site and a second site from a plurality of different sites of the digital circuit where a signal to be synchronized occurs; passing a first signal, which is the signal to be synchronized of the first site, via a first line that starts at the first site, ends at the second site, and contacts each of the sites just once, to the second site; passing a second signal, which is the signal to be synchronized of the second site, via a second line that starts at the second site, ends at the first site, and contacts each of the sites just once, to the first site; determining, for each site, a first phase shift between the signal to be synchronized of this site and the first signal, and a second phase shift between the signal to be synchronized of this site and the second signal; and determining, from the first and second phase shifts of each site, a delay for each site, with which the signal to be synchronized of the respective site is delayed for the synchronization.
摘要翻译： 数字电路的同步方法包括从数字电路的多个不同位置选择第一位置和第二位置，其中发生待同步的信号; 通过从第一站点开始的第一行传送作为第一站点同步的信号的第一信号在第二站点终止，并将每个站点一次接通到第二站点; 将通过第二站开始的第二行通过第二站点的同步信号的第二信号结束于第一站点，并将每个站点一次接通到第一站点; 为每个站点确定要同步的信号与第一信号之间的第一相移以及该站点的同步信号与第二信号之间的第二相移; 并且从每个站点的第一和第二相移确定延迟相应站点的要被同步的信号用于同步的每个站点的延迟。
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6.发明授权Coupling configuration for optically coupling an optical conductor to an opto-receiver 失效用于将光导体光耦合到光接收器的耦合配置公开(公告)号：US06954565B2
公开(公告)日：2005-10-11
申请号：US10159154
申请日：2002-05-31
申请人： Paul Lindt
发明人： Paul Lindt
CPC分类号： G02B6/262 , G02B6/4206 , G02B6/4214
摘要： A coupling configuration for connecting an optical conductor to an opto-receiver has a parabolic mirror or a spherical mirror that reflects light emerging from the optical conductor onto a launching mirror through which the light is launched into the opto-receiver. Such a configuration is largely adjustment-free and therefore particularly suitable for the connection of single-mode fibers (SMF).
摘要翻译： 用于将光导体连接到光接收器的耦合配置具有抛物面反射镜或球面镜，其将从光导体出射的光反射到发射反射镜，光通过该反射镜发射到光接收器中。 这种配置在很大程度上是无调整的，因此特别适用于连接单模光纤（SMF）。
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7.发明申请Method and filter arrangement for digital recursive filtering in the time domain 失效时域中数字递归滤波的方法和滤波器布置公开(公告)号：US20050108311A1
公开(公告)日：2005-05-19
申请号：US10714811
申请日：2003-11-17
申请人： Heinz Mattes , Peter Gregorius , Paul Lindt
发明人： Heinz Mattes , Peter Gregorius , Paul Lindt
CPC分类号： H03H17/0223 , H03H17/04
摘要： A method and apparatus for fast digital filtering that requires only filter stages of first and second order. A desired rational filter transfer function is represented as a sum of first and second order intermediate transfer functions. A time dependent input signal is first fed in parallel into a plurality of first and second order intermediate recursive filter stages. Then, the outputs of the intermediate filter stages are summed up to an output filter signal that corresponds to the desired rational filter transfer function. The method and apparatus reduces the amount of calculational effort to the order of O(N), where N denotes the number of sampling points in the time domain, because the digital filtering is based on a discrete recursive convolution in the time domain.
摘要翻译： 用于快速数字滤波的方法和装置，其仅需要一阶和二阶滤波器阶段。 期望的合理滤波传递函数被表示为第一和第二阶中间传递函数的和。 首先将依赖于时间的输入信号并入多个第一和第二阶中间递归滤波器级。 然后，将中间滤波器级的输出相加到对应于期望的有理滤波器传递函数的输出滤波器信号。 该方法和装置将计算努力的量减少到O（N）的阶数，其中N表示时域中的采样点的数量，因为数字滤波是基于时域中的离散递归卷积。
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