公开(公告)号：US08223793B2

公开(公告)日：2012-07-17

申请号：US11146300

申请日：2005-06-06

申请人： Peter Caldera ,  Thomas Ferianz

发明人： Peter Caldera ,  Thomas Ferianz

IPC分类号： H04L12/66

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096

摘要： A transmission apparatus for line signals is provided having a line device for transmitting the line signals at prescribed signal levels and having a line driver device which has an amplifier unit and a control unit. A determination unit is used to change over the operating mode of the amplifier unit when a signal level for the line signals exceeds a prescribed reference level by virtue of a determination unit having established that a prescribed reference signal level has been exceeded by the signal level of the line signals.

摘要翻译： 提供了一种用于线路信号的发送装置，具有用于以规定的信号电平发送线路信号的线路装置，并具有具有放大器单元和控制单元的线路驱动器装置。 当用于线路信号的信号电平超过规定的参考电平时，使用确定单元来切换放大器单元的工作模式，该确定单元已经确定已经超过了规定的参考信号电平， 线路信号。

公开(公告)号：US5841968A

公开(公告)日：1998-11-24

申请号：US871677

申请日：1997-06-06

申请人： Peter Caldera ,  Markus Steiner

发明人： Peter Caldera ,  Markus Steiner

IPC分类号： G01R31/3185 ,  G01R31/319 ,  G06F11/267 ,  G06F11/00

CPC分类号： G06F11/2236 ,  G01R31/318505 ,  G01R31/319 ,  G06F2201/83

摘要： A processor circuit configuration with a control processor and circuit blocks which are connected to the control processor through a bus. A testing device includes test decoders which are each assigned to a respective one of the circuit blocks. The test decoders receive control signals from the control processor and from a test logic, which is also connected to the bus, for controlling the circuit blocks. In a test mode, the test logic selects a given circuit block, deactivates all other circuit blocks, transmits test data through the bus to the given circuit block, activates the control processor, receives test data sent through the bus from the given circuit: block, evaluates the test data, and issues a corresponding result signal. The processing of the test data in the given circuit block is determined by the control processor.

摘要翻译： 具有通过总线连接到控制处理器的控制处理器和电路块的处理器电路配置。 测试装置包括测试解码器，每个测试解码器分配给相应的一个电路块。 测试解码器从控制处理器和测试逻辑接收控制信号，测试逻辑也连接到总线，用于控制电路块。 在测试模式下，测试逻辑选择给定的电路块，停用所有其他电路块，通过总线将测试数据发送到给定的电路块，激活控制处理器，接收从给定电路通过总线发送的测试数据：block ，评估测试数据，并发出相应的结果信号。 给定电路块中的测试数据的处理由控制处理器确定。

公开(公告)号：US06718020B2

公开(公告)日：2004-04-06

申请号：US10122164

申请日：2002-04-12

申请人： Peter Caldera ,  Roland Haeusler

发明人： Peter Caldera ,  Roland Haeusler

IPC分类号： H04M1100

CPC分类号： H04L12/66

摘要： Switchable POTS-splitter for separating a voice signal from a data signal having a high pass filter for the data signal and a low pass filter for the voice signal and for a ringing signal which is generated by a ringing signal generator of a central office and switched by means of a signal feeding switch to the low pass filter for a transmission to a remote transmission unit via a ring line, wherein the low pass filter comprises at least one capacitor and a corresponding capacitor switch for switching said capacitor to the ring line when the ringing signal is transmitted.

摘要翻译： 用于将语音信号与数据信号具有高通滤波器的数据信号和用于语音信号的低通滤波器以及由中心局的振铃信号发生器产生的振铃信号分离的可切换POTS分离器 通过信号馈送开关到低通滤波器，以经由环形线路传输到远程传输单元，其中低通滤波器包括至少一个电容器和相应的电容器开关，用于在所述低通滤波器 发送振铃信号。

公开(公告)号：US07019953B2

公开(公告)日：2006-03-28

申请号：US10440741

申请日：2003-05-19

申请人： Peter Caldera ,  Axel Schmitt

发明人： Peter Caldera ,  Axel Schmitt

IPC分类号： H02H9/00

CPC分类号： H04M3/18 ,  H02H9/041

摘要： A voltage protection circuit for a terminal of an electronic device, for example the TIP and RING lines of a linecard, is provided. The voltage protection circuit comprises a protection element, a first terminal of which is coupled to the terminal of the electronic device, a second terminal of which is coupled to a ground potential and a control terminal of which is coupled to a reference voltage element, the protection element having a low resistance between its first and second terminals when the control terminal is in a first state and a higher resistance between its first and second terminals when the control terminal is in a second state, the reference voltage element being further coupled to a reference voltage and being adapted such that the state of the control terminal depends on an applied voltage at the first terminal and the reference voltage. Additionally, a voltage limiting element for limiting the voltage drop over the reference voltage element coupled to the reference voltage and the ground potential is provided, leading to less severe demands on the reference voltage element. Additionally or alternatively, a voltage limiting element between the protection element and the reference voltage element may be provided.

摘要翻译： 提供了一种用于电子设备终端的电压保护电路，例如线卡的TIP和RING线路。 电压保护电路包括保护元件，其第一端耦合到电子器件的端子，其第二端耦合到接地电位，其控制端耦合到参考电压元件， 所述保护元件在所述控制端子处于第一状态时在所述第一端子与所述第二端子之间具有低电阻，并且当所述控制端子处于第二状态时在所述第一端子和所述第二端子之间具有较高的电阻，所述参考电压元件还耦合到 参考电压并且被适配成使得控制端子的状态取决于第一端子处的施加电压和参考电压。 此外，提供用于限制耦合到参考电压和地电位的参考电压元件上的电压降的电压限制元件，导致对参考电压元件的要求较低。 附加地或替代地，可以提供保护元件和参考电压元件之间的电压限制元件。

公开(公告)号：US20050286550A1

公开(公告)日：2005-12-29

申请号：US11146300

申请日：2005-06-06

申请人： Peter Caldera ,  Thomas Ferianz

发明人： Peter Caldera ,  Thomas Ferianz

IPC分类号： G11C7/10 ,  H02H9/02 ,  H02H9/04 ,  H03G11/04 ,  H03G11/08 ,  H04B3/02 ,  H04L12/66 ,  H04M3/00

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096

摘要： The invention provides a transmission apparatus for line signals (206a, 206b) having a line device (201) for transmitting the line signals (206a, 206b) at prescribed signal levels and having a line driver device (100) which has an amplifier unit (101) and a control unit (105). A determination unit (102) is used to change over the operating mode of the amplifier unit (101) when a signal level for the line signals (206a, 206b) exceeds a prescribed reference level (113a, 113b) by virtue of a determination unit (102) having established that a prescribed reference signal level (113a, 113b) has been exceeded by the signal level of the line signals (206a, 206b).

摘要翻译： 本发明提供了一种线路信号（206a，206b）的发送装置，具有线路装置（201），用于以规定的信号电平发送线路信号（206a，206b）并具有线路驱动装置（100） 放大器单元（101）和控制单元（105）。 当线路信号（206a，206b）的信号电平超过规定的参考电平（113a，113b）时，确定单元（102）用于改变放大器单元（101）的工作模式， 确定单元（102）已确定已经超过了行信号（206a，206b）的信号电平的规定参考信号电平（113a，113b）。

公开(公告)号：US5969567A

公开(公告)日：1999-10-19

申请号：US824442

申请日：1997-03-26

申请人： Alexander Kahl ,  Peter Caldera ,  Joerg Hauptmann ,  Franz Dielacher

发明人： Alexander Kahl ,  Peter Caldera ,  Joerg Hauptmann ,  Franz Dielacher

IPC分类号： H04B3/23 ,  H04B7/015 ,  H03K5/00

CPC分类号： H04B7/015 ,  H04B3/23

摘要： A circuit configuration for line adaptation and echo suppression includes a balance filter which is triggered by transmission signals and supplies output signals that are linked through a subtractor to a reception signal. An impedance adaptation filter is triggered by the reception signal and supplies an output signal that is linked through an adder to the transmission signal. An analog/digital converter converts analog reception signals into digital reception signals. A digital/analog converter converts digital transmission signals into analog transmission signals. The impedance adaptation filter processes digital signals and the balance filter processes analog signals.

摘要翻译： 用于线路适应和回波抑制的电路配置包括平衡滤波器，其由传输信号触发并且将通过减法器链接的输出信号提供给接收信号。 阻抗适配滤波器由接收信号触发，并将通过加法器链接的输出信号提供给发送信号。 模拟/数字转换器将模拟接收信号转换为数字接收信号。 数字/模拟转换器将数字传输信号转换为模拟传输信号。 阻抗适配滤波器处理数字信号，平衡滤波器处理模拟信号。

公开(公告)号：US06978007B1

公开(公告)日：2005-12-20

申请号：US09390497

申请日：1999-09-03

申请人： Gerald Höfer ,  Peter Caldera ,  Paul Kunisch

发明人： Gerald Höfer ,  Peter Caldera ,  Paul Kunisch

IPC分类号： H04M3/00 ,  H04M3/40 ,  H04M1/738

CPC分类号： H04M3/005 ,  H04M3/40

摘要： The communications system has a transmission network for transmitting useful data and control data. Call numbers are input at a subscriber terminal. A subscriber line unit with an adjustable transmission characteristic is connected between the subscriber terminal and the transmission network. A recognition unit connected to the transmission network recognizes particular call number patterns and outputs particular control signals corresponding to call number patterns. A control unit connected between the recognition unit and the subscriber line unit sets the transmission characteristic of the subscriber line unit depending on the control signals provided by the recognition unit.

摘要翻译： 通信系统具有传输有用数据和控制数据的传输网络。 呼叫号码在用户终端输入。 具有可调传输特性的用户线路单元连接在用户终端和传输网络之间。 连接到传输网络的识别单元识别特定呼叫号码模式并输出对应于呼叫号码模式的特定控制信号。 连接在识别单元和用户线路单元之间的控制单元根据由识别单元提供的控制信号设置用户线路单元的传输特性。

公开(公告)号：US06829629B1

公开(公告)日：2004-12-07

申请号：US10019366

申请日：2002-06-12

申请人： Thomas Magesacher ,  Lajos Gazsi ,  Peter Caldera

发明人： Thomas Magesacher ,  Lajos Gazsi ,  Peter Caldera

IPC分类号： G06F1717

CPC分类号： H03H17/0671 ,  H03H17/0664

摘要： A comb filter arrangement has an integrator that outputs an input value to a signal path. The signal path includes a delay stage for adjusting the input value using a delay factor, a decimator that converts the input value into a decimated output value using a non-integral factor, a differentiator that generates an intermediate output value from the input value, and an interpolation arrangement that receives the intermediate output value and generates a decimated sequence of the output value.

摘要翻译： 梳状滤波器装置具有向信号路径输出输入值的积分器。 信号路径包括用于使用延迟因子调整输入值的延迟级，使用非积分因子将输入值转换为抽取的输出值的抽取器，从输入值生成中间输出值的微分器，以及 插值装置，其接收中间输出值并生成输出值的抽取序列。

公开(公告)号：US5204831A

公开(公告)日：1993-04-20

申请号：US805584

申请日：1991-12-11

申请人： Lajos Gazsi ,  Peter Caldera

发明人： Lajos Gazsi ,  Peter Caldera

IPC分类号： H03H17/02 ,  G06F7/48

CPC分类号： G06F7/48 ,  G06F7/49994

摘要： A circuit configuration for digital bit-serial signal processing includes n input shift registers each being written in parallel or serially with an input data word and then read out by shifting to the right. Sign repetition devices are each assigned to a respective one of the input shift registers for continuously generating and shifting an algebraic sign of the input data word onward in the shift to the right. A serial arithmetic unit is connected downstream of the input shift registers for serially outputting output data words. m output shift registers connected downstream of the serial arithmetic unit are written in serially with the output data words and read out in parallel and/or serially. A control unit is connected to the serial arithmetic unit. Once all of the output data words have been fully written in the respective output shift registers, the control unit ends a readout of the input shift registers and the writing in of the output shift registers, for bringing the arithmetic unit to a defined initial state, and for enabling the input shift registers for writing in new input data words.

摘要翻译： 用于数字位串行信号处理的电路配置包括n个输入移位寄存器，每个输入移位寄存器与输入数据字并行或串行写入，然后通过向右移位读出。 符号重复装置各自分配给输入移位寄存器中的相应一个，用于在向右移位中连续产生和移位输入数据字的代数符号。 串行运算单元连接在输入移位寄存器的下游，用于串行输出输出数据字。 连接在串行运算单元下游的m个输出移位寄存器与输出数据字串联写入并且/或串行读出。 控制单元连接到串行运算单元。 一旦所有输出数据字已被完全写入相应的输出移位寄存器中，则控制单元结束输入移位寄存器的读出和输出移位寄存器的写入，以使算术单元处于定义的初始状态， 并且用于使输入移位寄存器能够写入新的输入数据字。