公开(公告)号：US08111180B2

公开(公告)日：2012-02-07

申请号：US12762082

申请日：2010-04-16

申请人： Andreas Wiesbauer ,  Lajos Gazsi

发明人： Andreas Wiesbauer ,  Lajos Gazsi

IPC分类号： H03M3/00

CPC分类号： H03M1/1265 ,  G04F10/005 ,  H03M3/43 ,  H03M3/456

摘要： This disclosure relates to analog to digital conversion using irregular sampling.

摘要翻译： 本公开涉及使用不规则采样的模数转换。

公开(公告)号：US07573955B2

公开(公告)日：2009-08-11

申请号：US11501408

申请日：2006-08-09

申请人： Lajos Gazsi

发明人： Lajos Gazsi

IPC分类号： H03D3/18

CPC分类号： H03L7/0991 ,  H03L7/085

摘要： A digital phase locked loop has a digitally controlled oscillator for generating an output frequency, a phase detector device for detecting the phase difference between a reference frequency and an output frequency of the oscillator. The phase detector device contains a delta-sigma frequency decision maker, and a digital loop filter, connected downstream of the phase detector device, for actuating the digitally controlled oscillator.

摘要翻译： 数字锁相环具有用于产生输出频率的数字控制振荡器，用于检测参考频率和振荡器的输出频率之间的相位差的相位检测器装置。 相位检测器装置包含一个delta-sigma频率决策器和一个数字环路滤波器，连接在相位检测器装置的下游，用于致动数字控制的振荡器。

公开(公告)号：US20090091486A1

公开(公告)日：2009-04-09

申请号：US12245342

申请日：2008-10-03

申请人： Andreas Wiesbauer ,  Lajos Gazsi

发明人： Andreas Wiesbauer ,  Lajos Gazsi

IPC分类号： H03M1/50 ,  H03M3/02

CPC分类号： H03M1/1265 ,  G04F10/005 ,  H03M3/43 ,  H03M3/456

摘要： This disclosure relates to analog to digital conversion using irregular sampling.

摘要翻译： 本公开涉及使用不规则采样的模数转换。

公开(公告)号：US20050193186A1

公开(公告)日：2005-09-01

申请号：US11064795

申请日：2005-02-24

申请人： Lajos Gazsi ,  Jinan Lin ,  Soenke Mehrgardt ,  Xiaoning Nie

发明人： Lajos Gazsi ,  Jinan Lin ,  Soenke Mehrgardt ,  Xiaoning Nie

IPC分类号： G06F9/00 ,  G06F9/30 ,  G06F9/38

CPC分类号： G06F9/3851 ,  G06F9/3012 ,  G06F9/30123 ,  G06F9/3802 ,  G06F9/3891

摘要： The invention relates to a heterogeneous parallel multithread processor (1) with shared contexts which has a plurality (M) of parallel-connected standard processor root unit types (2p; pε[1, . . . , M]), where each respective standard processor root unit type (2p) has at least one or more (K) parallel-connected standard processor root units (2pq; qε[1, . . . , K]) for instruction execution of program instructions from various threads (T), each standard processor root unit type (2p) having N local context memories (32pt) which each buffer-store part of a current processor state for a thread. The multithread processor (1) also has a plurality (N) of global context memories (3t; tε[1, . . . , N]) which each buffer-store part of a current processor state for a thread, and a thread control unit (4) which can connect any standard processor root unit (2pq) to any global context memory (3t).

摘要翻译： 本发明涉及具有共享上下文的异构并行多线程处理器（1），所述共享上下文具有多个（M）并行连接的标准处理器根单元类型（2＆lt; p＆gt;; pepsilon [1，...， M]），其中每个相应的标准处理器根单元类型（2P）具有至少一个或多个（K）并联连接的标准处理器根单元（2＆lt; pq＆gt; 用于从各种线程（T）指令执行程序指令的qepsilon [1，...，K]），具有N个本地上下文存储器的每个标准处理器根单元类型（2 > pt ），其中每个缓冲区存储线程当前处理器状态的一部分。 多线程处理器（1）还具有多个（N）个全局上下文存储器（3），每个缓冲器存储当前处理器状态的一部分 以及线程控制单元（4），其可以将任何标准处理器根单元（2 >）与任何全局上下文存储器（3T）进行连接。

公开(公告)号：US5315621A

公开(公告)日：1994-05-24

申请号：US14839

申请日：1993-02-08

申请人： Gonzalo Lucioni ,  Lajos Gazsi

发明人： Gonzalo Lucioni ,  Lajos Gazsi

IPC分类号： H03H17/00 ,  H03H17/06 ,  H03H21/00 ,  H04B3/04 ,  H04B1/10

CPC分类号： H03H21/0012

摘要： An adaptive nonrecursive digital filter includes a first filter unit having N controllable filter coefficients. A control unit controls the filter coefficients as a function of an input signal applied to the first filter unit at a given sampling rate and as a function of a difference between a reference signal and an output signal output by the first filter unit, in accordance with the least mean error square in each case. The first filter unit and the control unit sample the input signal and the reference signal continuously, with a cyclically varying delay, at a correspondingly increased sampling rate. A second filter unit is operated at the given sampling rate and has N controllable filter coefficients. The second filter unit receives the input signal, outputs a further output signal and has filter coefficients also being controlled by the control unit.

摘要翻译： 自适应非递归数字滤波器包括具有N个可控滤波器系数的第一滤波器单元。 控制单元根据给定的采样率来控制作为施加到第一滤波器单元的输入信号的函数的滤波器系数，并且根据第一滤波器单元输出的参考信号和输出信号之间的差值， 每种情况下最小均方误差平方。 第一滤波器单元和控制单元以相应增加的采样速率以循环变化的延迟对连续的采样输入信号和参考信号进行采样。 第二个滤波器单元以给定的采样率工作，具有N个可控滤波器系数。 第二滤波器单元接收输入信号，输出另外的输出信号，并且还具有由控制单元控制的滤波器系数。

公开(公告)号：US5251162A

公开(公告)日：1993-10-05

申请号：US947724

申请日：1992-09-18

申请人： Lajos Gazsi

发明人： Lajos Gazsi

IPC分类号： H03H19/00 ,  G06J1/00

CPC分类号： H03H19/004

摘要： An integratable circuit configuration includes an analog signal network being subject to fluctuations in a given way. A switched capacitor network is connected in series with the analog signal network and receives settable coefficients. An analog comparison network which is subject to the fluctuations in the given way, receives an excitation signal and supplies a response signal in response to the excitation signal. An evaluation circuit is connected to the analog comparison network and to the switched capacitor network for comparing the response signal with a reference signal and setting the coefficients of the switched capacitor network as a function of the comparison.

摘要翻译： 可集成电路配置包括以给定方式经受波动的模拟信号网络。 开关电容网络与模拟信号网络串联连接并接收可设置的系数。 受到给定方式的波动的模拟比较网络接收激励信号并且响应于激励信号提供响应信号。 评估电路连接到模拟比较网络和开关电容网络，用于将响应信号与参考信号进行比较，并根据比较设置开关电容网络的系数。

公开(公告)号：US5243548A

公开(公告)日：1993-09-07

申请号：US947725

申请日：1992-09-18

申请人： Lajos Gazsi

发明人： Lajos Gazsi

IPC分类号： H03H17/02

CPC分类号： H03H17/0289

摘要： An integratable circuit configuration includes an analog signal network being subject to fluctuations in a given way. An analog/digital converter is connected downstream of the analog signal network. A digital signal network is connected downstream of the analog/digital converter for receiving settable coefficients. An analog comparison network being subject to the fluctuations in the same given way receives an excitation signal and supplies a response signal in response to the excitation signal. An evaluation circuit is connected to the analog comparison network and to the digital signal network for comparing the response signal with a reference signal and setting the coefficients of the digital signal network as a function of the comparison. According to another embodiment, a digital/analog converter is connected upstream of the analog signal network. Then the digital signal network is connected upstream of the digital/analog converter.

摘要翻译： 可集成电路配置包括以给定方式经受波动的模拟信号网络。 模拟/数字转换器连接在模拟信号网络的下游。 数字信号网络连接在模拟/数字转换器的下游，用于接收可设定的系数。 以相同给定方式受到波动的模拟比较网络接收激励信号并响应于激励信号提供响应信号。 评估电路连接到模拟比较网络和数字信号网络，用于将响应信号与参考信号进行比较，并将数字信号网络的系数设置为比较的函数。 根据另一个实施例，数模转换器连接在模拟信号网络的上游。 然后数字信号网络连接在数模转换器的上游。

公开(公告)号：US5130943A

公开(公告)日：1992-07-14

申请号：US538842

申请日：1990-06-15

申请人： Lajos Gazsi ,  Dieter Bruckmann

发明人： Lajos Gazsi ,  Dieter Bruckmann

IPC分类号： H03H21/00

CPC分类号： H03H21/0012

摘要： In a method and configuration for improving the dynamic range of an adaptive recursive network for processing discrete-time signals, gradient signals are formed from output signals of the network with respect to network parameters. The output signals of the network are compared with set-point signals to form differential signals. Signals of a signum function of the gradient signals are formed. The signals of the signum function are multiplied with the differential signals to form correction signals proportional to the product of the signals of the signum function and the differential signals.

摘要翻译： 在用于改善用于处理离散时间信号的自适应递归网络的动态范围的方法和配置中，相对于网络参数从网络的输出信号形成梯度信号。 将网络的输出信号与设定点信号进行比较，形成差分信号。 形成梯度信号的信号功能的信号。 信号功能的信号与差分信号相乘，以形成与信号功能和差分信号的信号成正比的校正信号。

公开(公告)号：US08830104B2

公开(公告)日：2014-09-09

申请号：US13187975

申请日：2011-07-21

申请人： Stephan Henzler ,  Matthias Schoebinger ,  Lajos Gazsi

发明人： Stephan Henzler ,  Matthias Schoebinger ,  Lajos Gazsi

IPC分类号： H03M1/12

CPC分类号： H03M1/125 ,  H03M1/504

摘要： Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).

摘要翻译： 公开了电路和系统的示例性实施方式，以及用于信号处理的方法，包括通过无源脉冲调制模数转换器（PMADC）实现的振幅和频带限制信号的采样和量化。

公开(公告)号：US07339987B2

公开(公告)日：2008-03-04

申请号：US10484959

申请日：2002-07-24

申请人： Lajos Gazsi ,  Matthias Schoebinger

发明人： Lajos Gazsi ,  Matthias Schoebinger

IPC分类号： H03H7/30

CPC分类号： H04L25/03057 ,  H04L2025/03547 ,  H04L2025/03617

摘要： The invention relates to a device for correcting a receiver signal which is associated with an emission signal transmitted in a distorted transmission system. The emission signal comprises periods which can be determined by analyzing the received signal wherein determined properties are exhibited which are suitable for adjusting the correction. According to one embodiment, the device comprises a component for adjusting the correction based upon an analysis of the received signal and a component for monitoring and enabling the adjusting component when the received signal associated with the transmission signal exhibits certain characteristics.

摘要翻译： 本发明涉及一种用于校正与在失真传输系统中传输的发射信号有关的接收机信号的装置。 发射信号包括可以通过分析所接收的信号来确定其周期，其中显示适合于调整校正的确定的特性。 根据一个实施例，该装置包括用于基于对接收信号的分析来调整校正的组件和用于在与传输信号相关联的接收信号表现出某些特性时监视和启用调整组件的组件。