公开(公告)号：US6065147A

公开(公告)日：2000-05-16

申请号：US920038

申请日：1997-08-28

申请人： Ramesh Pyndiah ,  Patrick Adde

发明人： Ramesh Pyndiah ,  Patrick Adde

IPC分类号： G06F11/10 ,  H03M13/00 ,  H03M13/23 ,  H03M13/29 ,  H03M13/45

CPC分类号： H03M13/458 ,  H03M13/2906 ,  H03M13/2963

摘要： The bits transmitted are coded according to the product of at least two systematic block codes. Iterative decoding is applied in order to determine, at each code word search step, a data matrix ({R}) and a decision matrix ({D}) used for the following step. The new decision matrix is determined at each step by decoding the rows or columns of the input matrix, and the new data matrix is determined taking into account the correction terms which increase the reliability of the decoding on each iteration. The coding and decoding circuits (17) are rendered programmable by a puncturing technique allowing selection of the number of bits transmitted per coded block, the punctured bits preferably having uniformly distributed positions according to each dimension of the matrices.

摘要翻译： 发送的比特根据至少两个系统块码的乘积进行编码。 应用迭代解码以便在每个码字搜索步骤中确定用于下一步骤的数据矩阵（{R}）和决策矩阵（{D}）。 通过对输入矩阵的行或列进行解码来确定每个步骤的新决策矩阵，并且考虑在每个迭代上增加解码的可靠性的校正项来确定新的数据矩阵。 编码和解码电路（17）通过删截技术可编程，允许选择每个编码块传输的比特数，根据矩阵的每个维度，穿孔比特优选地具有均匀分布的位置。

公开(公告)号：US20110161785A1

公开(公告)日：2011-06-30

申请号：US12935184

申请日：2009-03-31

申请人： Ramesh Pyndiah ,  Andrzej Kabat ,  Karine Amis ,  Frédéric Guilloud

发明人： Ramesh Pyndiah ,  Andrzej Kabat ,  Karine Amis ,  Frédéric Guilloud

IPC分类号： H03M13/09

CPC分类号： H04L1/0065 ,  H04B7/15592 ,  H04L1/0071

摘要： A method is provided for transmitting a digital signal between at least two transmitters and at least one receiver, using a concatenation of at least two codes. The method includes a first encoding step, in the transmitters, which outputs at least two first code words; a first transmission step of the first code words, via at least two distinct transmission channels; a receiving step, in at least one relay device, of at least two of the first code words, known as intermediate code words; a step of intertwining at least one part of the bits of the intermediate code words that outputs the intertwined bits; a second step of encoding the intertwined bits, in the relay(s), which outputs at least one second code word, taking into consideration the intermediate code words; a second step of transmitting the second code word(s) through the relay device(s), so as to enable, in the receiver(s), an iterative decoding, taking into account the first code words, and then a redundancy formed by the second code word(s).

摘要翻译： 提供了一种用于使用至少两个代码的级联在至少两个发射机与至少一个接收机之间传输数字信号的方法。 该方法包括在发射机中的第一编码步骤，其输出至少两个第一码字; 经由至少两个不同的传输信道的第一码字的第一传输步骤; 在至少一个中继装置中的至少两个第一码字的接收步骤，称为中间码字; 将输出相互缠绕的位的中间代码字的位的至少一部分相互交织的步骤; 在继电器中编码交织的位的第二步骤，其考虑到中间码字，输出至少一个第二码字; 第二步骤，通过中继装置发送第二码字，以便在接收机中能够考虑到第一码字，然后考虑到第一码字，然后由 第二个代码字。

公开(公告)号：US4845389A

公开(公告)日：1989-07-04

申请号：US162522

申请日：1988-03-01

申请人： Ramesh Pyndiah ,  Patrice Gamand

发明人： Ramesh Pyndiah ,  Patrice Gamand

IPC分类号： H03D7/12 ,  H03D9/06 ,  H04B1/26

CPC分类号： H03D9/0675 ,  H03D2200/0027 ,  H03D7/125

摘要： A mixer of the two-transistor type (T.sub.1, T.sub.2) arranged in series by a source S.sub.2 and a drain D.sub.1. A Gate G.sub.1 receives a radio frequency signal RF and a gate G.sub.2 a local oscillator signal L0. Matching networks R.sub.1 and R.sub.2 are provided for the respective signals RF and L0. One element of the network R.sub.3 positioned at the output (drain D.sub.2 of the transistor T.sub.2) restores a short-circuit at the frequency f.sub.L0 of the local oscillator. The instability of the input G.sub.2 of the transistor T.sub.2 is compensated for by an inductor element L inserted between the junction point of the source S.sub.2 and the drain D.sub.1 and the common-mode pole.

摘要翻译： 由源极S2和漏极D1串联布置的双晶体管类型（T1，T2）的混频器。 门G1接收射频信号RF和门G2本地振荡器信号L0。 为相应的信号RF和L0提供匹配网络R1和R2。 位于输出端的晶体管R3的一个元件（晶体管T2的漏极D2）以本地振荡器的频率fL0恢复短路。 晶体管T2的输入G2的不稳定性由插入在源极S2的接合点与漏极D1和共模极之间的电感器元件L补偿。

公开(公告)号：US08510640B2

公开(公告)日：2013-08-13

申请号：US12935184

申请日：2009-03-31

申请人： Ramesh Pyndiah ,  Andrzej Kabat ,  Karine Amis ,  Frederic Guilloud

发明人： Ramesh Pyndiah ,  Andrzej Kabat ,  Karine Amis ,  Frederic Guilloud

IPC分类号： H03M13/00

CPC分类号： H04L1/0065 ,  H04B7/15592 ,  H04L1/0071

摘要： A method is provided for transmitting a digital signal between at least two transmitters and at least one receiver, using a concatenation of at least two codes. The method includes a first encoding step, in the transmitters, which outputs at least two first code words; a first transmission step of the first code words, via at least two distinct transmission channels; a receiving step, in at least one relay device, of at least two of the first code words, known as intermediate code words; a step of intertwining at least one part of the bits of the intermediate code words that outputs the intertwined bits; a second step of encoding the intertwined bits, in the relay(s), which outputs at least one second code word, taking into consideration the intermediate code words; a second step of transmitting the second code word(s) through the relay device(s), so as to enable, in the receiver(s), an iterative decoding, taking into account the first code words, and then a redundancy formed by the second code word(s).

摘要翻译： 提供了一种用于使用至少两个代码的级联在至少两个发射机与至少一个接收机之间传输数字信号的方法。 该方法包括在发射机中的第一编码步骤，其输出至少两个第一码字; 经由至少两个不同的传输信道的第一码字的第一传输步骤; 在至少一个中继装置中的至少两个第一码字的接收步骤，称为中间码字; 将输出相互缠绕的位的中间代码字的位的至少一部分相互交织的步骤; 在继电器中编码交织的位的第二步骤，其考虑到中间码字，输出至少一个第二码字; 第二步骤，通过中继装置发送第二码字，以便在接收机中能够考虑到第一码字，然后考虑到第一码字，然后由 第二个代码字。

公开(公告)号：US5130763A

公开(公告)日：1992-07-14

申请号：US467625

申请日：1990-01-19

申请人： Etienne Delhaye ,  Michel Wolny ,  Thierry Aguila ,  Ramesh Pyndiah

发明人： Etienne Delhaye ,  Michel Wolny ,  Thierry Aguila ,  Ramesh Pyndiah

IPC分类号： H01L29/78 ,  H01L27/095 ,  H01L29/80 ,  H03B19/14 ,  H03K19/21

CPC分类号： H03B19/14 ,  H03K19/217

摘要： An integrated semiconductor device, including an insulated-gate field effect transistor biased to a constant level, has a drain-source current characteristic as a function of the gate-source voltage which exhibits a negative transconductance zone beyond a maximum, the slopes of the characteristic on both sides thereof being substantially symmetrical so that two values of the gate-source voltage which are symmetrical with respect to said maximum correspond substantially to the same value of the drain source current, and in that the transistor comprises biasing means ensuring that its operating zone is situated in the region of said characteristic around said maximum.

摘要翻译： 包括偏置到恒定电平的绝缘栅场效应晶体管的集成半导体器件具有作为栅极 - 源极电压的函数的漏极 - 源极电流特性，其具有超过最大值的负跨导区域，特性的斜率 其两侧基本对称，使得相对于所述最大值对称的栅极 - 源极电压的两个值基本上对应于漏极源电流的相同值，并且晶体管包括偏置装置，确保其工作区域 位于围绕所述最大值的所述特征的区域中。

公开(公告)号：US5039958A

公开(公告)日：1991-08-13

申请号：US467628

申请日：1990-01-19

申请人： Etienne Delhaye ,  Michel Wolny ,  Thierry Aguila ,  Ramesh Pyndiah

发明人： Etienne Delhaye ,  Michel Wolny ,  Thierry Aguila ,  Ramesh Pyndiah

IPC分类号： H01L29/78 ,  G11C11/39 ,  H01L21/338 ,  H01L29/812 ,  H03B7/06 ,  H03K3/36

CPC分类号： H03K3/36 ,  G11C11/39 ,  H03B7/06

摘要： An integrated semiconductor device, including an insulated-gate field effect transistor biased to a constant level in order to obtain for the transistor an N-shaped drain-source current characteristic as a function of the drain-source voltage so that it presents a negative differential conductance zone, characterized in that it comprises means for applying, between the drain and the source of the field effect transistor, a voltage whose value is in the range of values the drain-source voltage corresponding to the negative conductance zone.

摘要翻译： 一种集成半导体器件，包括偏置到恒定电平的绝缘栅场效应晶体管，以便为晶体管获得作为漏 - 源电压的函数的N形漏 - 源电流特性，使得其呈现负差分 电导区，其特征在于，其包括用于在场效应晶体管的漏极和源极之间施加其值在与负电导区相对应的漏极 - 源极电压的值的范围内的电压的装置。

公开(公告)号：US07219291B2

公开(公告)日：2007-05-15

申请号：US10416484

申请日：2001-11-09

申请人： Patrick Adde ,  Ramesh Pyndiah

发明人： Patrick Adde ,  Ramesh Pyndiah

IPC分类号： H03M13/29

CPC分类号： H03M13/6577 ,  H03M13/2963 ,  H03M13/6566

摘要： The invention concerns a module for decoding a concatenated code, corresponding at least to two elementary codes C1 and C2, using storage means (81, 83, 90, 111, 113) wherein are stored samples of data to be decoded, comprising at least two elementary decoders (821, 822, . . . 82m) of at least one of the elementary codes, the elementary decoders associated with one of the elementary codes simultaneously processing, in parallel separate code words contained in the storage means.

摘要翻译： 本发明涉及一种用于使用存储装置（81,83,90,111，...，111）解码连接代码的模块，对应于至少两个基本代码C 1和C 2， 113），其中存储要解码的数据的样本，包括至少两个基本解码器（82＆lt; 1＆gt;，82＆lt; 2＆gt;，... 82＆lt; 所述基本代码中的至少一个，所述基本解码器与所述基本代码中的一个相关联地同时处理，并行地包含在所述存储装置中。

公开(公告)号：US6122763A

公开(公告)日：2000-09-19

申请号：US919969

申请日：1997-08-28

申请人： Ramesh Pyndiah ,  Patrick Adde

发明人： Ramesh Pyndiah ,  Patrick Adde

IPC分类号： G06F11/10 ,  H03M13/00 ,  H03M13/23 ,  H03M13/25 ,  H03M13/29

CPC分类号： H03M13/6362 ,  H03M13/251 ,  H03M13/2909 ,  H03M13/2963 ,  H03M13/453 ,  H03M13/6502

摘要： The bits transmitted are coded according to the product of at least two systematic block codes. Iterative decoding is applied in order to determine, at each code word search step, a data matrix ({R}) and a decision matrix ({D}) used for the following step. The new decision matrix is determined at each step by decoding the lines or columns of the input matrix, and the new data matrix is determined taking into account the correction terms which increase the reliability of the decoding on each iteration. The coding and decoding circuits (17) are rendered programmable by a shortening technique allowing selection of the number k-X of non-redundant information bits per block to be coded. Known values are assigned to the other bits, the positions of which are uniformly distributed according to each dimension of the matrices.

摘要翻译： 发送的比特根据至少两个系统块码的乘积进行编码。 应用迭代解码以便在每个码字搜索步骤中确定用于下一步骤的数据矩阵（{R}）和决策矩阵（{D}）。 通过对输入矩阵的行或列进行解码来确定每个步骤的新决策矩阵，并且考虑在每次迭代时增加解码的可靠性的校正项来确定新的数据矩阵。 编码和解码电路（17）通过缩短技术被编程，允许选择要编码的每个块的非冗余信息比特数k-X。 已知值被分配给其他位，其位置根据矩阵的每个维度均匀分布。

公开(公告)号：US5563897A

公开(公告)日：1996-10-08

申请号：US345370

申请日：1994-11-18

申请人： Ramesh Pyndiah ,  Alain Glavieux ,  Claude Berrou

发明人： Ramesh Pyndiah ,  Alain Glavieux ,  Claude Berrou

IPC分类号： H03M13/00 ,  H03M13/29 ,  H03M13/45 ,  H04L1/00 ,  H04L27/00

CPC分类号： H04L1/0064 ,  H03M13/2963 ,  H03M13/453 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0071 ,  H04L1/0052

摘要： The transmitted bits are coded according to the product of at least two systematic block codes. An iterative decoding is applied in order to determine, at each code word search step, a data matrix and a decision matrix which are used for the following step. The new decision matrix is determined at each step by decoding the rows or the columns of the input matrix, and the new data matrix is determined by taking account of correction terms which increase the reliability of the decoding at each iteration. The method is especially suited for use with high-efficiency block codes.

摘要翻译： 发送的比特根据至少两个系统块码的乘积进行编码。 应用迭代解码以便在每个码字搜索步骤中确定用于下一步骤的数据矩阵和决策矩阵。 通过对输入矩阵的行或列进行解码来确定每个步骤的新决策矩阵，并且通过考虑在每次迭代时增加解码的可靠性的校正项来确定新的数据矩阵。 该方法特别适用于高效率块码。

公开(公告)号：US5087898A

公开(公告)日：1992-02-11

申请号：US663074

申请日：1991-02-28

申请人： Ramesh Pyndiah ,  Francis van den Bogaart

发明人： Ramesh Pyndiah ,  Francis van den Bogaart

IPC分类号： H03H11/38 ,  H01P1/38 ,  H03F3/60 ,  H03H11/52

CPC分类号： H01P1/38 ,  H03H11/52

摘要： An integrated semiconductor active isolator circuit which includes a negative feedback amplifier having an active semiconductor amplifier element. The control terminal of the semiconductor amplifying element defines the output of the isolator circuit and a principal conduction electrode of the semiconductor amplifying element defines an input of the isolator circuit.

摘要翻译： 一种集成半导体有源隔离器电路，其包括具有有源半导体放大器元件的负反馈放大器。 半导体放大元件的控制端限定绝缘电路的输出，半导体放大元件的主导电极限定隔离电路的输入。