公开(公告)号：US20160241192A1

公开(公告)日：2016-08-18

申请号：US14622591

申请日：2015-02-13

申请人： QUALCOMM Incorporated

发明人： Cheng-Han WANG ,  Alberto CICALINI ,  Thinh Cat NGUYEN ,  Mohammad Bagher VAHID FAR ,  Jesse Aaron RICHMOND

IPC分类号： H03D7/14 ,  H03D7/16

CPC分类号： H03D7/145 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D2200/0027

摘要： A method, an apparatus, and a system product for mixing radio frequency signals are provided. In one aspect, the apparatus is configured to perform switching of switches based on first, second, third, and fourth phased half duty clock signals. The apparatus convolves a differential input signal on a differential input port with the first, second, third, and fourth phased half duty cycle clock signals to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port. The first, second, third, and fourth phased half duty cycle clock signals are of the same frequency and out of phase by a multiple of ninety degrees with respect to each other.

摘要翻译： 提供了一种用于混合射频信号的方法，装置和系统产品。 一方面，该装置被配置为基于第一，第二，第三和第四相位半占空时钟信号来执行开关的切换。 该装置利用第一，第二，第三和第四相位半占空比时钟信号在差分输入端口上卷积差分输入信号，以同时产生差分同相输出信号和双差分上的差分正交相输出信号 输出端口 第一，第二，第三和第四相位半占空比时钟信号的频率相同，相位相差90度。

公开(公告)号：US5974306A

公开(公告)日：1999-10-26

申请号：US908995

申请日：1997-08-08

申请人： Thomas Hornak ,  Knud Knudsen

发明人： Thomas Hornak ,  Knud Knudsen

IPC分类号： H04L27/34 ,  H03B19/00 ,  H03B27/00 ,  H03D7/00 ,  H03D7/14 ,  H03D7/16 ,  H03D7/18 ,  H04B1/10 ,  H04B1/26 ,  H04L27/18 ,  H04B1/16

CPC分类号： H03D7/18 ,  H03D7/00 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/165 ,  H03B19/00 ,  H03B2200/0064 ,  H03B27/00 ,  H03D2200/0017 ,  H03D2200/0025 ,  H03D2200/0027 ,  H03D2200/0043 ,  H03D2200/0047 ,  H03D2200/005 ,  H03D2200/006 ,  H03D2200/0078 ,  H03D2200/0082 ,  H03D7/161

摘要： An image-rejecting receiver comprises a tunable mixer stage, a time-share I-Q mixer stage, a complex filter, and an image rejector. The time-share I-Q mixer stage includes a switch assembly, inphase and quadrature polarity inverters, and a clock generator. The switch assembly generates pulses and distributes them in alternation to the polarity inverters. Performing distribution prior to polarity inversion preserves the orthogonality of the inphase and quadrature target signal components despite pulse-to-pulse bleeding. Charge accumulated at the distributor switch input is dumped between pulses to further minimize such bleeding. A current-mode field-effect-transistor implementation ensures unity gain across each polarity inverter so that they are gain-matched. Gain matching and preservation of orthogonality optimize the conditions for the complex filter to attenuate and for the image rejector to cancel an image signal. The polarity inverters are switched in quadrature to relax polarity-inverter transition timing tolerances, decreasing costs and increasing reliability.

摘要翻译： 图像拒绝接收机包括可调谐混频器级，时分共享I-Q混频器级，复合滤波器和图像排出器。 时分I-Q混频器级包括开关组件，同相和正交极性反相器以及时钟发生器。 开关组件产生脉冲并将它们分配给极性反相器。 在极性反转之前执行分布保持了脉冲到脉冲出血的同相和正交目标信号分量的正交性。 在分配器开关输入处累积的电荷被倾倒在脉冲之间，以进一步最小化这种出血。 电流模式场效应晶体管实现确保每个极性反相器的单位增益，使得它们是增益匹配的。 增益匹配和保存正交性优化复合滤波器衰减的条件，并为图像排除器取消图像信号。 极性反相器切换正交以松弛极性 - 反相器转换时序公差，降低成本并增加可靠性。

公开(公告)号：US4602217A

公开(公告)日：1986-07-22

申请号：US671876

申请日：1984-11-15

申请人： Keiro Shinkawa

发明人： Keiro Shinkawa

IPC分类号： H03D3/24 ,  H03D3/00

CPC分类号： H03D3/241 ,  H03D2200/0027 ,  H03D2200/0047

摘要： In an FM demodulator of the phase locked loop system wherein a closed loop is formed by a phase detector, an amplifier, a loop filter, and a voltage controlled oscillator, a part of the amplifier is formed by a differential amplifying circuit which has a constant current source and is driven by a constant current. The center frequency of the frequency demodulation slope of the constant current source is changed by changing the current from the constant current source in response to the signal which was frequency demodulated by the phase locked loop. Further, a low-pass filter having the pass band of the frequency band of the signal to be modulated is provided in the path of the system from the differential amplifying circuit to the constant current source.

摘要翻译： 在锁相环系统的FM解调器中，其中由相位检测器，放大器，环路滤波器和压控振荡器形成闭环，放大器的一部分由差分放大电路形成，该差分放大电路具有常数 电流源，由恒流驱动。 恒定电流源的频率解调斜率的中心频率根据由锁相环频率解调的信号改变来自恒流源的电流而改变。 此外，在从差分放大电路到恒流源的系统的路径中设置具有要调制的信号的频带的通带的低通滤波器。

公开(公告)号：US5850164A

公开(公告)日：1998-12-15

申请号：US861491

申请日：1997-05-22

申请人： Pascal Mellot

发明人： Pascal Mellot

IPC分类号： H04N5/60 ,  H03D3/02 ,  H03D3/24 ,  H03L7/087 ,  H03L7/099 ,  H03L7/107 ,  H03L7/113 ,  H04B1/26 ,  H03D3/06

CPC分类号： H03L7/107 ,  H03D3/241 ,  H03D3/245 ,  H03L7/099 ,  H03L7/113 ,  H03D2200/0027 ,  H03L2207/06 ,  H03L7/087

摘要： The invention provides a demodulation PLL wherein: the first position of a switch, which is controlled by a control circuit, respectively connects the outputs of a mixer and a LP filter to high gain and low gain inputs of an oscillator when frequency signals at the inputs of the mixer have not converged sufficiently, i.e. during the PLLs tuning mode; the second position of the switch respectively connects the outputs of the mixer and the LP filter to the low gain and high gain inputs of the oscillator when the frequency signals at the inputs of the mixer and the signal levels on the input and output of the filter have converged sufficiently, i.e. during the PLLs demodulation mode.

摘要翻译： 本发明提供一种解调PLL，其中：由控制电路控制的开关的第一位置分别在混频器和LP滤波器的输出端连接到振荡器的高增益和低增益输入端，当输入端的频率信号 的混频器没有充分收敛，即在PLL调谐模式期间; 当混频器输入端的频率信号和滤波器的输入和输出信号电平时，开关的第二位置分别将混频器和LP滤波器的输出端连接到振荡器的低增益和高增益输入 已经充分收敛，即在PLL解调模式期间。

公开(公告)号：US5589791A

公开(公告)日：1996-12-31

申请号：US489129

申请日：1995-06-09

申请人： Barrie Gilbert

发明人： Barrie Gilbert

IPC分类号： H03D7/12 ,  H03D7/14 ,  H03G1/00 ,  G06G7/16

CPC分类号： H03G1/0023 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0025 ,  H03D2200/0027 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0047 ,  H03D7/12

摘要： A mixer section is combined with a post-mixer linearizer to counteract the nonlinear transconductance characteristics of the RF input section of the mixer thereby increasing the overall linear response of the mixer. The post-mixer linearizer has a response that is increasingly non-linear outside the non-linear operating range of the RF input section. This non-linear response compensates for the decreasingly non-linear response of the RF input section. Current mirrors in the post-mixer linearizer increase the rail-to-rail headroom of the mixer while maintaining high gain. An input driver is coupled to the mixer that provides quick switching transitions in the mixer to reduce noise effects. The mixer also includes a gain control circuit that provides linear-in-decibel gain control.

摘要翻译： 混频器部分与后混频器线性化器组合以抵消混频器的RF输入部分的非线性跨导特性，从而增加混频器的总线性响应。 后混频器线性化器具有在RF输入部分的非线性工作范围之外越来越非线性的响应。 该非线性响应补偿了RF输入部分的递减非线性响应。 后混频器线性化电流器中的电流镜增加了混频器的轨到轨余量，同时保持了高增益。 输入驱动器耦合到混频器，其提供混频器中的快速切换转换以减少噪声影响。 混频器还包括提供线性分贝增益控制的增益控制电路。

公开(公告)号：US5428840A

公开(公告)日：1995-06-27

申请号：US165355

申请日：1993-12-10

申请人： Virender K. Sadhir

发明人： Virender K. Sadhir

IPC分类号： H03C1/58 ,  H03D7/14 ,  H03D9/06 ,  H04B1/26

CPC分类号： H03D7/1408 ,  H03D9/0633 ,  H03C1/58 ,  H03D2200/0013 ,  H03D2200/0017 ,  H03D2200/0023 ,  H03D2200/0027

摘要： A double balanced microstrip mixer circuit for a monolithic microwave integrated circuit comprising a diode ring modulator coupled to a first balun for supplying radio frequency signals to the mixer circuit and a second balun for supplying a signal generated locally to the mixer circuit, two outputs leading from the diode ring modulator for providing an intermediate frequency signal, a first pair of circuits coupled between the first balun and the diode ring modulator and a second pair of circuits coupled between the second balun and the diode ring modulator, for enabling broadband frequencies to be applied to the diode ring modulator independent of impedances created by the first and second baluns. The circuit further includes two low pass filters each coupled to one of the two outputs for rejecting unwanted feed through and a in-phase combiner coupled to the low pass filters.

摘要翻译： 一种用于单片微波集成电路的双平衡微带混频器电路，包括耦合到第一平衡 - 不平衡变换器的二极管环形调制器，用于向混频器电路提供射频信号;以及第二平衡 - 不平衡变换器，用于将本地产生的信号提供给混频器电路， 用于提供中频信号的二极管环形调制器，耦合在第一平衡 - 不平衡变换器和二极管环形调制器之间的第一对电路以及耦合在第二平衡 - 不平衡变换器和二极管环形调制器之间的第二对电路，用于实现宽带频率 到二极管环形调制器，与第一和第二巴伦所产生的阻抗无关。 该电路还包括两个低通滤波器，每个低通滤波器分别耦合到两个输出中的一个输出端，用于抑制不需要的馈通和耦合到低通滤波器的同相组合器。

公开(公告)号：US4340975A

公开(公告)日：1982-07-20

申请号：US195314

申请日：1980-10-08

申请人： Hiroshi Onishi ,  Sadahiko Yamashita

发明人： Hiroshi Onishi ,  Sadahiko Yamashita

IPC分类号： H03B1/00 ,  H03B5/18 ,  H03D7/14 ,  H03D7/16 ,  H03D9/06 ,  H03D7/02 ,  H04B1/26 ,  H04N5/44

CPC分类号： H03D7/161 ,  H03D9/0633 ,  H03B2201/0208 ,  H03B2201/0225 ,  H03B5/1823 ,  H03D2200/0017 ,  H03D2200/0027 ,  H03D7/1408

摘要： In a double superheterodyne tuner for receiving TV channel signals, a frequency in a range defined between 2520 and 2700 MHz is selected as the first intermediate frequency, while the first intermediate frequency is obtained by subtracting a desired channel frequency from a first local oscillator frequency. The tuner comprises first and second mixing circuits respectively used for effecting frequency conversion, where each of these mixing circuits has parallel coupled lines so that each mixing circuit operates as a balance-to-unbalance transformer. The second mixing circuit further comprises a short-circuit line placed between the parallel coupled lines. The tuner also comprises a band pass filter having a band width less than 5 MHz, which selectively transmits the first intermediate frequency signal from the first mixing circuit.

摘要翻译： 在用于接收TV信道信号的双重超外差调谐器中，选择在2520和2700MHz之间的范围内的频率作为第一中频，而通过从第一本机振荡器频率减去所需信道频率获得第一中频。 调谐器包括分别用于实现频率转换的第一和第二混频电路，其中这些混频电路中的每一个具有并联耦合线，使得每个混频电路作为平衡不平衡变压器工作。 第二混合电路还包括放置在并联耦合线之间的短路线。 调谐器还包括带宽小于5MHz的带通滤波器，其选择性地传输来自第一混频电路的第一中频信号。

公开(公告)号：US3628154A

公开(公告)日：1971-12-14

申请号：US3628154D

申请日：1968-05-31

申请人： LAWRENCE R WEILL

发明人： WEILL LAWRENCE R

IPC分类号： H03D7/00 ,  H04B1/26 ,  H03B1/04

CPC分类号： H03D7/00 ,  H03D2200/0021 ,  H03D2200/0027 ,  H03D2200/006

摘要： Simple switches are used for shifting a signal band, fo, to a new location, fo+f1, without distortion. The band is split into two opposed phases, chopped with square waves of frequencies f1 and odd harmonies 3f1, 5f1, etc., which are weighted in amplitude by the factors 1, one-third, one-fifth, etc., and are finally added. Unwanted components 3f1, 5f1, etc., are found to be easily canceled, obviating a difficult filtering problem.

公开(公告)号：US20080315953A1

公开(公告)日：2008-12-25

申请号：US11993001

申请日：2006-06-30

申请人： Sung Ho Beck

发明人： Sung Ho Beck

IPC分类号： H03G3/10 ,  H03D7/10

CPC分类号： H03D7/12 ,  H03D7/1433 ,  H03D7/1458 ,  H03D2200/0019 ,  H03D2200/0025 ,  H03D2200/0027 ,  H03D2200/0043 ,  H03D2200/0088

摘要： There is provided a variable gain mixer capable of controlling a gain at a low source voltage in a wide range without additional current consumption.The mixer includes: mixers constructed with variable gain amplifiers having two transistor pairs Qp+/Qp− and Qn+/Qn− to have a predetermined gain by using LO+ and LO− signals; and LO bias circuits connected to have bias voltages different from each other with respect to the LO+ and LO− signals of the mixers and share an input signal.Accordingly, by integrating the variable gain amplifiers into the mixers, a gain change can be obtained at a low source voltage in a wide range without connecting a number of variable gain amplifiers. In addition, by properly applying the LO signals used in the mixers, the gain change can have a linearity in dB characteristic

摘要翻译： 提供了一种可变增益混频器，其能够在宽范围内控制低电源电压下的增益，而无需额外的电流消耗。 混频器包括：由具有两个晶体管对Qp + / Qp-和Qn + / Qn-的可变增益放大器构成的混频器通过使用LO +和LO-信号具有预定的增益; 并且LO偏置电路被连接以相对于混频器的LO +和LO-信号彼此不同的偏置电压并且共享输入信号。 因此，通过将可变增益放大器集成到混频器中，可以在宽范围内的低电源电压下获得增益变化，而不连接多个可变增益放大器。 另外，通过适当地应用混频器中使用的LO信号，增益变化可以具有dB特性的线性度

公开(公告)号：US5918167A

公开(公告)日：1999-06-29

申请号：US815121

申请日：1997-03-11

申请人： Samuel Alfred Tiller ,  John Jackson Nisbet

发明人： Samuel Alfred Tiller ,  John Jackson Nisbet

IPC分类号： H03D3/00 ,  H04B1/30 ,  H04B1/26

CPC分类号： H03D3/008 ,  H04B1/30 ,  H03D2200/0027 ,  H03D2200/0047 ,  H03D2200/009

摘要： A quadrature downconversion stage in a radio frequency receiver compensates for leakage from the quadrature local oscillator to the input of the stage by deriving first and second feedback signals from the quadrature local oscillator. The first feedback signal is 180.degree. out of phase with the in-phase component of the signal supplied to the input of the stage and the second feedback signal is 180.degree. out of phase with the quadrature component of the signal supplied to the input of the stage. The invention reduces or cancels a d.c. offset that can appear at the output of the stage. Another advantage is the reduction of re-radiated signals resulting from the local oscillator leakage. The invention is particularly applicable to direct converters.

摘要翻译： 无线电频率接收机中的正交下变频级通过从正交本地振荡器得到第一和第二反馈信号来补偿从正交本地振荡器到级的输入的泄漏。 第一反馈信号与提供给级输入的信号的同相分量相差180°，第二反馈信号与提供给输入端的信号的信号的正交分量相差180° 阶段。 本发明减少或取消直径 偏移可以出现在舞台的输出端。 另一个优点是减少由本地振荡器泄漏引起的再辐射信号。 本发明特别适用于直接转换器。