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1.发明授权Method and apparatus for generating multiple signals at multiple frequencies 失效用于在多个频率上产生多个信号的方法和装置
公开(公告)号：US5630222A
公开(公告)日：1997-05-13
申请号：US566518
申请日：1995-12-04
摘要： A frequency synthesizer (100) is used for generating a plurality of signals operating at a plurality of frequencies that are integer multiples of a reference frequency. The frequency synthesizer (100) includes a plurality of phase lock loops coupled to a single phase error detector. The phase error detector (103) is connected to a reference signal (104), a first generated signal (116) and a sampler signal (136) derived from a second generated signal (132). The phase error detector (103) includes a shared counter (118), and first and second registers (106, 122) connected to the output of the shared counter (118). First and second phase lock loops (101, 105) are used for phase locking to the reference signal (104). The first and second phase lock loops (101, 105) derive phase error signals from the first and second registers (106, 122), thereby adjusting the first and second generated signals (116, 132).
摘要翻译： 频率合成器（100）用于产生以参考频率的整数倍的多个频率工作的多个信号。 频率合成器（100）包括耦合到单相误差检测器的多个锁相环。 相位误差检测器（103）连接到从第二生成信号（132）导出的参考信号（104），第一生成信号（116）和取样器信号（136）。 相位误差检测器（103）包括共享计数器（118）以及连接到共享计数器（118）的输出的第一和第二寄存器（106,122）。 第一和第二锁相环（101,105）用于相位锁定到参考信号（104）。 第一和第二锁相环（101,105）从第一和第二寄存器（106,122）导出相位误差信号，从而调整第一和第二产生信号（116,132）。
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2.发明授权Current controlled variable frequency oscillator having an improved operational transconductance amplifier 失效具有改进的运算跨导放大器的电流控制可变频率振荡器
公开(公告)号：US5564089A
公开(公告)日：1996-10-08
申请号：US49938
申请日：1993-04-20
CPC分类号： H03B5/24 , H03F3/4521 , H03B2201/02 , H03F2203/45656 , H03F2203/45674
摘要： A current controlled variable frequency oscillator (260) operates at a characteristic frequency that is determined primarily by a scaled current. A filter cascade (320) receives the scaled current for setting a filter cascade frequency substantially equal to the characteristic frequency. Additionally, the filter cascade (320) receives a triangular signal at a non-inverting input, the filter cascade (320) converting the triangular signal into a sinewave signal. A lowpass filter (330) receives the scaled current for setting a lowpass filter frequency to a frequency substantially less than the characteristic frequency. The lowpass filter (330) also receives the sinewave signal and provides an average signal therefrom. A comparator (340) receives the scaled current, wherein the comparator (340) compares the sinewave signal and the average signal for providing a substantially squarewave signal therefrom. An integrator (310) is provided for receiving the scaled current, the integrator (310) integrating the substantially squarewave signal for providing the triangular signal therefrom.
摘要翻译： 电流控制可变频率振荡器（260）以主要由缩放电流确定的特征频率工作。 滤波器级联（320）接收缩放的电流，用于设置基本上等于特征频率的滤波器级联频率。 另外，滤波器级联（320）在非反相输入端接收三角形信号，滤波器级联（320）将三角形信号转换为正弦波信号。 低通滤波器（330）接收用于将低通滤波器频率设置为基本小于特征频率的频率的缩放电流。 低通滤波器（330）还接收正弦波信号并从其提供平均信号。 比较器（340）接收缩放的电流，其中比较器（340）比较正弦波信号和平均信号以从其提供基本上方波的信号。 提供积分器（310）用于接收定标电流，积分器（310）积分基本上方波信号以从其提供三角形信号。
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公开(公告)号：US5412336A
公开(公告)日：1995-05-02
申请号：US150660
申请日：1993-11-10
CPC分类号： H03F1/223
摘要： A cascode amplifier circuit including an input mirroring transistor (401) that generates a first output current (403) in response to the input signal. A diode connected transistor (404) generates a control bias proportional to the first output current. A cascode connected transistor output stage (405) includes a common source transistor (406) coupled to the input signal and the input mirroring transistor (401) for establishing an output current (407) in the cascode connected transistor output stage. A common gate transistor (408) is coupled to the diode connected transistor (404) and the common source transistor (406) for isolating the common source transistor (406) from any change in an output voltage present at an output terminal (409) of the common gate transistor (408) while operating to control the output currently(407) in response to the control bias.
摘要翻译： 一种级联放大器电路，包括响应于输入信号产生第一输出电流（403）的输入镜像晶体管（401）。 二极管连接的晶体管（404）产生与第一输出电流成比例的控制偏置。 共源共栅连接的晶体管输出级（405）包括耦合到输入信号的公共源晶体管（406）和用于在共源共栅连接的晶体管输出级中建立输出电流（407）的输入镜像晶体管（401）。 公共栅极晶体管（408）耦合到二极管连接的晶体管（404）和公共源极晶体管（406），用于将公共源极晶体管（406）与存在于输出端子（409）处的输出电压的任何变化隔离 公共栅极晶体管（408）在操作时响应于控制偏压来控制当前的输出（407）。
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公开(公告)号：US5789973A
公开(公告)日：1998-08-04
申请号：US707673
申请日：1996-09-04
CPC分类号： H03H11/0422
摘要： A resistorless amplifier circuit uses integrated operational transconductance amplifiers to realize a plurality of circuit transfer functions. The preferred embodiment produces an output signal voltage V.sub.out (500) that is either g.sub.m1 /g.sub.m3 or g.sub.m1 /(g.sub.m3 -g.sub.m1) times the input signal voltage V.sub.in (400). Additionally, an alternative embodiment implements a resistorless summing and subtracting operational transconductance amplifier circuit that realizes an output signal voltage as follows: ##EQU1## The resistorless amplifier circuit includes a first operational transconductance amplifier (100) with a transconductance g.sub.m1, a second operational transconductance amplifier (200) with a transconductance g.sub.m2, and a third operational transconductance amplifier (300) with a transconductance g.sub.m3.
摘要翻译： 无阻抗放大器电路使用集成的运算跨导放大器来实现多个电路传输功能。 优选实施例产生输入信号电压Vin（400）的输出信号电压Vout（500），其为gm1 / gm3或gm1 /（gm3-gm1）倍。 另外，替代实施例实现如下实现无输出信号电压的无阻抗求和运算跨导放大器电路：无图像放大器电路包括具有跨导gm1的第一运算跨导放大器（100），第二运算跨导放大器 （200）和具有跨导gm3的第三操作跨导放大器（300）。
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5.发明授权Method and apparatus for determining an instantaneous phase difference between two signals 失效用于确定两个信号之间的瞬时相位差的方法和装置
公开(公告)号：US5552750A
公开(公告)日：1996-09-03
申请号：US523665
申请日：1995-09-05
CPC分类号： H03L7/183 , H03D13/001 , H03L7/091
摘要： A method and apparatus determine an instantaneous phase difference (207) between a reference signal (103) and a controlled signal (120). The reference signal (103) is derived by frequency dividing a first signal by a counter (106) including an output (107) having K sequential states, wherein K is an integer value equal to the frequency of the first signal (103) divided by the frequency of the desired reference signal, and wherein the output (107) changes by no more than one bit between any adjacent states of the K sequential states. The output (107) of the counter (106) is recorded (206) at a time concurrent with a first predetermined event occurring in the controlled signal (120), thereby generating a recorded count value that is free from metastability induced errors. The recorded count value is decoded (208) to produce a sequential state number S.sub.E corresponding to the first predetermined event. The instantaneous phase difference (207) is then calculated (210) from S.sub.E, K, and other predetermined constants.
摘要翻译： 方法和装置确定参考信号（103）和受控信号（120）之间的瞬时相位差（207）。 参考信号（103）是通过用包括具有K个顺序状态的输出（107）的计数器（106）对第一信号进行分频而导出的，其中K是等于第一信号（103）的频率的整数值除以 所述参考信号的频率，并且其中所述输出（107）在所述K个顺序状态的任何相邻状态之间改变不超过一个比特。 与受控信号（120）中发生的第一预定事件同时记录（206）计数器（106）的输出（107），从而生成没有亚稳引起的误差的记录计数值。 记录的计数值被解码（208）以产生对应于第一预定事件的顺序状态号码SE。 然后从SE，K和其他预定常数计算（210）瞬时相位差（207）。
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公开(公告)号：US5337007A
公开(公告)日：1994-08-09
申请号：US147235
申请日：1993-11-04
CPC分类号： H03F3/3001 , H03F3/45076
摘要： A class AB transconductance amplifier (200) has first and second differential input amplifier stages (100-112) adapted for receiving first and second differential input signals (Vin+, Vin-). First and second input cascode stages are coupled to the first and second differential input amplifier stages for providing first and second differential folded cascode signals. An output stage (113-118) is coupled to the first and second differential folded cascode signals providing an output signal indicative of a difference between the first and second differential input signals (Vin+, Vin-). A bias stage (101, 102) is coupled to said first and second differential input amplifier stages (103-104, 105-106) and the first and second input cascode stages bias the first and second differential input amplifier stages (100-112) to operate as a class AB folded cascode amplifier circuit (200). The bias stage generates class AB biasing signals.
摘要翻译： AB类跨导放大器（200）具有适于接收第一和第二差分输入信号（Vin +，Vin-）的第一和第二差分输入放大器级（100-112）。 第一和第二输入共源共栅级耦合到第一和第二差分输入放大器级，以提供第一和第二差分折叠共源共栅信号。 输出级（113-118）耦合到第一和第二差分折叠共源共栅信号，提供表示第一和第二差分输入信号（Vin +，Vin-）之间的差的输出信号。 偏置级（101,102）耦合到所述第一和第二差分输入放大器级（103-104,10-10-106），并且第一和第二输入共源共栅级偏置第一和第二差分输入放大器级（100-112） 作为AB折叠共源共栅放大器电路（200）操作。 偏置级产生AB类偏置信号。
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公开(公告)号：US4519066A
公开(公告)日：1985-05-21
申请号：US447221
申请日：1982-12-06
CPC分类号： G08B13/2477 , G07C9/00111 , G08B13/2462
摘要： A duplexer is provided in which a transmit input signal is fed in parallel through two autotransformers to a pair of portal loops for establishing an interrogation field. Significantly lower voltage response signals returning via the autotransformers are applied in push-push relationship to the primary of one transformer for producing a difference signal output, and in parallel to a second transformer primary for producing a sum signal output. Back-to-back diodes across the secondary windings of the sum and difference output transformers limit the volt drop across the respective primaries for the relatively higher voltage transmit input signal. The response signal, however, is below the threshold of the diodes and, consequently, the diodes do not attenuate such signal.
摘要翻译： 提供了一种双工器，其中发射输入信号通过两个自耦变压器并联馈送到一对门限线圈，用于建立询问场。 通过自耦变压器返回的显着较低的电压响应信号以与一个变压器初级的推挽关系施加，用于产生差分信号输出，并且与第二变压器并联以产生和信号输出。 在和差分输出变压器的次级绕组上的背对背二极管限制相对较高电压发射输入信号的相应原色的电压降。 然而，响应信号低于二极管的阈值，因此二极管不会衰减这种信号。
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8.发明授权Controlled tracking of oscillators in a circuit with multiple frequency sensitive elements 失效控制跟踪具有多个频率敏感元件的电路中的振荡器
公开(公告)号：US5610558A
公开(公告)日：1997-03-11
申请号：US552136
申请日：1995-11-03
CPC分类号： H03L7/0805 , H03L7/07 , H03L7/23
摘要： An oscillator circuit (143) comprises a master phase-locked loop (PLL) circuit (202) that receives as input a first reference frequency signal (136) and generates a first clock signal (210) in response to an oscillator control signal (212). The oscillator circuit (143) includes a frequency sensitive slave circuit (206) having at least one frequency sensitive element (322) that is responsive to a tracking control signal (214) to generate a second clock signal (216). A tracking control circuit (204) is responsive to the oscillator control signal (212) for generating the tracking control signal (214). The tracking control signal (214) serves as a bias signal, and is connected to the frequency sensitive slave circuit (206) for achieving a fast power up sequence of the oscillator circuit (143).
摘要翻译： 振荡器电路（143）包括主控锁相环（PLL）电路，其作为输入接收第一参考频率信号，并且响应于振荡器控制信号（212）产生第一时钟信号（210） ）。 振荡器电路（143）包括具有响应于跟踪控制信号（214）以产生第二时钟信号（216）的至少一个频率敏感元件（322）的频率敏感从属电路（206）。 跟踪控制电路（204）响应振荡器控制信号（212）以产生跟踪控制信号（214）。 跟踪控制信号（214）用作偏置信号，并连接到频率敏感从属电路（206），以实现振荡器电路（143）的快速上电序列。
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公开(公告)号：US5373249A
公开(公告)日：1994-12-13
申请号：US150930
申请日：1993-11-10
CPC分类号： H03F3/3001
摘要： A complementary cascode push-pull amplifier circuit includes a bias generator, a complementary bias generator, a cascode input stage (416, 417), a cascode output stage (410, 411), a complementary cascode input stage (456,457), and a complementary cascode output stage (450,451). The bias generator is responsive to a first input signal (420) and generates a bias control voltage. The complementary bias generator is responsive to a second input (421) and generates a complementary bias control voltage. The cascode output stage (410, 411) and the complementary cascode output stage (450,451) each have an output coupled to a common output terminal (510) for generating a portion of an output current signal in response to the respective input signals (420, 421) and in response to the bias control voltage and the complementary bias control voltage being generated.
摘要翻译： 互补共源共栅放大器电路包括偏置发生器，互补偏置发生器，共源共栅输入级（416,417），共源共栅输出级（410,411），互补共源共栅输入级（456,457）和互补 共源共栅输出级（450,451）。 偏置发生器响应于第一输入信号（420）并产生偏置控制电压。 互补偏置发生器响应于第二输入（421）并产生互补偏置控制电压。 级联输出级（410,411）和互补共源共栅输出级（450,451）各自具有耦合到公共输出端（510）的输出，用于响应于相应的输入信号（420,411）产生输出电流信号的一部分， 并且响应于所产生的偏置控制电压和互补偏置控制电压。
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公开(公告)号：US5363061A
公开(公告)日：1994-11-08
申请号：US152991
申请日：1993-11-10
CPC分类号： H03F3/347
摘要： A multi-output integrated circuit amplifier (500) consists of a first primary current mirror (510), and a plurality of secondary current mirrors (520). The first primary current mirror (510) implemented in a single substrate and having a first primary input (511). The first primary current mirror (510) generates a plurality of first inverted primary current outputs in response to a first current signal coupled to the first primary input (511). The plurality of secondary current mirrors are implemented in the same single substrate and each has a secondary input coupled to a unique one of the plurality of primary current outputs of the first primary current mirror (510), each of said plurality of secondary current mirrors (520) having a gain, and each of said plurality of secondary current mirrors (520) generating an inverted secondary current output signal, the magnitude of which is determined substantially by the unique one of the plurality of primary current outputs coupled thereto and the gain thereof.
摘要翻译： 多输出集成电路放大器（500）由第一初级电流镜（510）和多个次级电流镜（520）组成。 第一初级电流镜（510）实现在单个衬底中并具有第一主要输入（511）。 响应于耦合到第一主输入端的第一电流信号，第一初级电流镜510产生多个第一反相一次电流输出。 多个次级电流镜被实现在相同的单个衬底中，并且每个都具有耦合到第一初级电流镜（510）的多个初级电流输出中的唯一一个的次级输入，所述多个次级电流镜 520），并且所述多个次级电流镜（520）中的每一个产生反相的次级电流输出信号，其大小基本上由耦合到其的多个初级电流输出中唯一的一个确定，并且其增益 。
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