公开(公告)号：US4417264A

公开(公告)日：1983-11-22

申请号：US472565

申请日：1983-03-07

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: G11C14/00 ,  G11C16/04 ,  G11C17/00 ,  H01L21/8247 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  G11C11/40 ,  H01L27/02 ,  H01L29/04

CPC classification number: H01L29/7883 ,  G11C16/0433

Abstract: A novel, nonvolatile floating gate memory structure is described wherein the floating gate is substantially shielded from the substrate by the control gate. The control gate is provided with a pair of apertures, through which portions of the floating gate extends. One aperture serves as means for "writing" and "erasing" while the other aperture serves as means for "reading".

Abstract translation: 描述了一种新颖的非易失性浮动栅极存储器结构，其中浮动栅极通过控制栅极基本上与衬底隔离。 控制门设置有一对孔，浮动门的部分延伸穿过该孔。 一个光圈用作“写入”和“擦除”的装置，而另一个光圈用作“读取”的装置。

公开(公告)号：US4387354A

公开(公告)日：1983-06-07

申请号：US297768

申请日：1981-08-31

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: H03H15/02 ,  G11C27/02 ,  H01L27/10

CPC classification number: H03H15/02

Abstract: By dividing the split gate electrode into four sections, in which two non-adjacent sections are solely clock sections and the other two sections are "plus" and "minus" sections, respectively, and in which the sum of the lengths of the first two sections, in serial order, is substantially equal to the sum of the last two sections, in serial order, only a single mask must be changed, in the fabrication of transversal filters that exhibit a small common mode, in order to change the particular filter characteristic of a fabricated filter.

Abstract translation: 通过将分离栅极分为四个部分，其中两个非相邻部分仅为时钟部分，另外两个部分分别为“正”和“负”部分，其中前两个部分的长度之和 为了改变特定的滤波器，串联顺序的截面基本上等于最后两个部分的总和，按照序列顺序，只有一个掩模必须改变，在制作展示小共模的横向滤波器时， 制造过滤器的特点。

公开(公告)号：US4274193A

公开(公告)日：1981-06-23

申请号：US54981

申请日：1979-07-05

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: H01L21/033 ,  H01L21/336 ,  H01L29/417 ,  H01L29/423 ,  H01L21/26

CPC classification number: H01L29/66575 ,  H01L21/033 ,  H01L29/41775 ,  H01L29/4238

Abstract: A method of manufacturing a closed gate MOS transistor having a self-aligned drain contact is presented which insures that the drain contact will have the minimum required geometry. The method employs a self-aligned procedure which insures that the drain contact will have the minimum dimensions to insure a high speed device.

Abstract translation: 提出了一种制造具有自对准漏极接触的封闭栅极MOS晶体管的方法，其确保漏极接触将具有最小要求的几何形状。 该方法采用自对准程序，确保漏极接触件具有最小尺寸以确保高速设备。

公开(公告)号：US4237383A

公开(公告)日：1980-12-02

申请号：US944013

申请日：1978-09-20

Applicant: Walter F. Kosonocky ,  Rodney L. Angle

Inventor： Walter F. Kosonocky ,  Rodney L. Angle

IPC: G11C19/28 ,  H01L27/148 ,  H04N5/372 ,  H01J40/14

CPC classification number: G11C19/287 ,  H01L27/14856 ,  H04N3/1543 ,  H04N3/1575

Abstract: The output register of a CCD imager system is loaded at high speed by, for each row of charges, first translating the m charges in each group of m adjacent ones of the n columns of the imager into m serially occurring charges and temporarily storing each group of m serially occurring charges in a separate CCD register. The time available for the translation and temporary storage is equal to the time required serially to read out the output register. The n/m temporarily stored groups of charges are then concurrently serially shifted from the n/m registers in which they are stored to the output register which comprises m parallel registers, each with n/m stages. This shifting for loading the register can be performed at very high speed.

Abstract translation: CCD成像器系统的输出寄存器通过对于每一列的电荷高速加载，首先将成像器的n列的m个相邻的m个组中的m个电荷转换成m个连续发生的电荷并暂时存储每个组 在单独的CCD寄存器中产生m个串联电荷。 翻译和临时存储可用的时间等于读取输出寄存器所需的时间。 然后，将n / m个暂时存储的电荷组从其存储的n / m个寄存器并行地串行移位到包括m个并行寄存器的输出寄存器，每个并行寄存器具有n / m级。 这种用于装载寄存器的移位可以以非常高的速度执行。

公开(公告)号：US4199691A

公开(公告)日：1980-04-22

申请号：US916079

申请日：1978-06-16

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: G11C19/28 ,  H01L27/105 ,  H01L29/78 ,  H03K5/00

CPC classification number: G11C19/287 ,  H01L27/1057

Abstract: Charge-coupled device (CCD) including a plurality of parallel CCD channels and common electrodes extending over these channels for controlling the flow of charge in the channels. Potential barrier regions are located beneath certain of the electrodes in certain of the channels, each pair of barrier regions separated by a normal channel region, and voltages are applied to the electrodes at levels such that charge in a channel containing the barrier regions is trapped and temporarily delayed in the normal channel region between the barrier regions relative to the propagation of charge in a channel not containing barrier regions. The structure is useful, for example, in tree networks for parallel-to-serial signal translation and vice versa.

Abstract translation: 电荷耦合器件（CCD）包括多个并行CCD通道和在这些通道上延伸的公共电极，用于控制通道中的电荷流。 电势屏障区域位于某些通道中的某些电极下方，每一对屏障区域由正常沟道区域分开，并且电压被施加到电极，使得包含阻挡区域的通道中的电荷被捕获， 相对于不包含阻挡区域的通道中的电荷的传播，在屏障区域之间的正常沟道区域暂时延迟。 该结构在例如用于并行到串行信号转换的树形网络中是有用的，反之亦然。

公开(公告)号：US4558339A

公开(公告)日：1985-12-10

申请号：US607716

申请日：1984-05-07

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: H01L29/788 ,  H01L29/78 ,  G11C11/40 ,  H01L27/02 ,  H01L29/04

CPC classification number: H01L29/7883

Abstract: A novel, nonvolatile, floating gate memory structure, and a method for its fabrication, is described wherein the floating gate is substantially shielded from the substrate by the program or control gate. The program or control gate is provided with an aperture located over an auxiliary channel region. A portion of the floating gate is formed to extend through the aperture to allow charge to be played on the floating gate.

Abstract translation: 描述了一种新颖的非易失性浮动栅极存储器结构及其制造方法，其中浮动栅极通过程序或控制栅极基本上与衬底隔离。 程序或控制门设置有位于辅助通道区域上方的孔。 浮动栅极的一部分形成为延伸穿过孔径以允许在浮动栅极上播放电荷。

公开(公告)号：US4382267A

公开(公告)日：1983-05-03

申请号：US305172

申请日：1981-09-24

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: H04N5/217 ,  H04N5/372 ,  H04N3/15 ,  H01L31/00

CPC classification number: H04N5/37206 ,  H04N3/1525

Abstract: Digital control means responsive to an applied digital signal controls which row or rows of an N row-Q column CCD imager are effective in transferring charge and which are not. Such digital control is suitable for use in providing variable gain for a time-delay integration (TDI) charge-transfer imager in accordance with the average brightness level of the light incident on the imager.

Abstract translation: 响应于所应用的数字信号的数字控制装置控制N行Q列CCD成像器的哪一行或多行有效地传送电荷，哪些不是。 这种数字控制适用于根据入射在成像器上的光的平均亮度水平为时间延迟积分（TDI）电荷转移成像器提供可变增益。

公开(公告)号：US4272881A

公开(公告)日：1981-06-16

申请号：US59473

申请日：1979-07-20

Applicant: Rodney L. Angle

Inventor： Rodney L. Angle

IPC: H01L21/8247 ,  H01L21/033 ,  H01L21/336 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  H01L21/26

CPC classification number: H01L29/66659 ,  H01L21/033 ,  H01L29/4238 ,  Y10S438/944

Abstract: A method of manufacturing a closed gate MOS transistor having a self-aligned drain contact is presented which insures that the drain contact will have the minimum required geometry. The method employs a self-aligned procedure which insures that the drain contact will be the minimum dimensions to insure a high speed device. Also, the completed device includes a dual layer passivation overcoat which insures a hermetically sealed device.

Abstract translation: 提出了一种制造具有自对准漏极接触的封闭栅极MOS晶体管的方法，其确保漏极接触将具有最小要求的几何形状。 该方法采用自对准程序，其确保漏极接触将是确保高速设备的最小尺寸。 此外，完成的装置包括确保密封装置的双层钝化外涂层。