公开(公告)号：US4249967A

公开(公告)日：1981-02-10

申请号：US106632

申请日：1979-12-26

申请人： Yet-Zen Liu ,  Shang-Yi Chiang

发明人： Yet-Zen Liu ,  Shang-Yi Chiang

IPC分类号： H01L33/00 ,  H01L33/14 ,  H01L33/38 ,  H01L21/208

CPC分类号： H01L33/38 ,  H01L33/0025 ,  H01L33/145

摘要： A small-area light-emitting diode of the surface-emitting type has a double heterojunction semiconductor structure grown on a substrate. A semiconductor blocking layer having a hole formed therein is disposed between the substrate and the layers of the double heterojunction semiconductor structure to confine the transverse current flow for greater efficiency. A metallic contact layer is formed on the surface of the double heterojunction semiconductor structure on the side opposite the substrate and has a registering hole formed therein having a size approximately equal to the size of the hole formed in the semiconductor blocking layer and disposed in registration therewith along an axis perpendicular to the layers. The cap layer of the double heterojunction semiconductor structure may include a hole etched therethrough and in registration with the previously mentioned holes for better light emission. In a further embodiment, the light-emitting layer is restricted in surface area to a region aligned with said holes for even greater light efficiency and current confinement.

摘要翻译： 表面发射型的小面积发光二极管具有在衬底上生长的双异质结半导体结构。 其中形成有孔的半导体阻挡层设置在基板和双异质结半导体结构的层之间，以限制横向电流以提高效率。 在双异质结半导体结构的与衬底相对的一侧的表面上形成金属接触层，并且具有形成在其中的配准孔，其尺寸近似等于在半导体阻挡层中形成的孔的尺寸并与其对准 沿垂直于层的轴。 双异质结半导体结构的覆盖层可以包括蚀刻穿过其中并与前述孔对准的孔，以获得更好的发光。 在另一个实施例中，发光层的表面积被限制到与所述孔对准的区域，以获得更高的光效和电流限制。

公开(公告)号：US07994032B2

公开(公告)日：2011-08-09

申请号：US12845496

申请日：2010-07-28

申请人： Shang-Yi Chiang ,  Chung Wang ,  Shou-Gwo Wuu ,  Dun-Nian Yaung

发明人： Shang-Yi Chiang ,  Chung Wang ,  Shou-Gwo Wuu ,  Dun-Nian Yaung

IPC分类号： H01L21/38

CPC分类号： H01L27/14623 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/148

摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.

摘要翻译： 本公开提供了一种图像传感器半导体器件。 半导体器件包括具有前表面和后表面的衬底; 形成在所述基板的前表面上的多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向所述后表面的光; 以及形成在所述基板中并且水平放置在所述多个传感器元件的两个相邻元件之间并且垂直地位于所述背表面和所述多个传感器元件之间的铝掺杂特征。

公开(公告)号：US20100289102A1

公开(公告)日：2010-11-18

申请号：US12845496

申请日：2010-07-28

申请人： Shang-Yi CHIANG ,  Chung WANG ,  Shou-Gwo WUU ,  Dun-Nian YAUNG

发明人： Shang-Yi CHIANG ,  Chung WANG ,  Shou-Gwo WUU ,  Dun-Nian YAUNG

IPC分类号： H01L31/102 ,  H01L31/0352 ,  H01L31/18

CPC分类号： H01L27/14623 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/148

摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.

摘要翻译： 本公开提供了一种图像传感器半导体器件。 半导体器件包括具有前表面和后表面的衬底; 形成在所述基板的前表面上的多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向所述后表面的光; 以及形成在所述基板中并且水平放置在所述多个传感器元件的两个相邻元件之间并且垂直地位于所述背表面和所述多个传感器元件之间的铝掺杂特征。

公开(公告)号：US07791170B2

公开(公告)日：2010-09-07

申请号：US11456291

申请日：2006-07-10

申请人： Shang-Yi Chiang ,  Chung Wang ,  Shou-Gwo Wuu ,  Dun-Nian Yaung

发明人： Shang-Yi Chiang ,  Chung Wang ,  Shou-Gwo Wuu ,  Dun-Nian Yaung

IPC分类号： H01L25/065

CPC分类号： H01L27/14623 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/148

摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.

摘要翻译： 本公开提供了一种图像传感器半导体器件。 半导体器件包括具有前表面和后表面的衬底; 形成在所述基板的前表面上的多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向所述后表面的光; 以及形成在所述基板中并且水平放置在所述多个传感器元件的两个相邻元件之间并且垂直地位于所述背表面和所述多个传感器元件之间的铝掺杂特征。

公开(公告)号：US4220960A

公开(公告)日：1980-09-02

申请号：US954703

申请日：1978-10-25

申请人： Yet-Zen Liu ,  Shang-Yi Chiang

发明人： Yet-Zen Liu ,  Shang-Yi Chiang

IPC分类号： H01L33/14 ,  H01L33/00

CPC分类号： H01L33/145

摘要： A small-area light-emitting diode of the surface-emitting type has a double heterojunction semiconductor structure grown on a substrate. A semiconductor blocking layer having a hole formed therein is disposed between the substrate and the layers of the double heterojunction semiconductor structure to confine the transverse current flow for greater efficiency. A metallic contact layer is formed on the surface of the double heterojunction semiconductor structure on the side opposite the substrate and has a registering hole formed therein having a size approximately equal to the size of the hole formed in the semiconductor blocking layer and disposed in registration therewith along an axis perpendicular to the layers. The cap layer of the double heterojunction semiconductor structure may include a hole etched therethrough and in registration with the previously mentioned holes for better light emission. In a further embodiment, the light-emitting layer is restricted in surface area to a region aligned with said holes for even greater light efficiency and current confinement.

摘要翻译： 表面发射型的小面积发光二极管具有在衬底上生长的双异质结半导体结构。 其中形成有孔的半导体阻挡层设置在基板和双异质结半导体结构的层之间，以限制横向电流以提高效率。 在双异质结半导体结构的与衬底相对的一侧的表面上形成金属接触层，并且具有形成在其中的配准孔，其尺寸近似等于在半导体阻挡层中形成的孔的尺寸并与其对准 沿垂直于层的轴。 双异质结半导体结构的覆盖层可以包括蚀刻穿过其中并与前述孔对准的孔，以获得更好的发光。 在另一个实施例中，发光层的表面积被限制到与所述孔对准的区域，以获得更高的光效和电流限制。

公开(公告)号：US4133698A

公开(公告)日：1979-01-09

申请号：US864283

申请日：1977-12-27

申请人： Shang-Yi Chiang ,  Bernard G. Carbajal

发明人： Shang-Yi Chiang ,  Bernard G. Carbajal

IPC分类号： H01L31/0224 ,  H01L31/0236 ,  H01L31/068 ,  H01L31/06

CPC分类号： H01L31/02168 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/0682 ,  Y02E10/547

摘要： A solar cell having first and second closely spaced, parallel P-N junctions is fabricated, wherein the illuminated surface is totally free of metallization, i.e., the junction nearest the illuminated surface is not electrically connected, and thereby participates only indirectly in the collection of photo-generated carriers by providing a charge field to suppress the front surface recombination and to enhance collection at the back side junction. All metallization is on the back side, which preferably includes an interposed finger pattern of N+ and P+ zones.

摘要翻译： 制造具有第一和第二紧密间隔开的平行PN结的太阳能电池，其中所照射的表面完全没有金属化，即，最接近被照射的表面的结不与电连接，从而仅间接地参与光 - 通过提供电荷场来抑制前表面复合并增强背面接合处的收集。 所有金属化在背面，其优选包括N +和P +区的插入的指形图案。

公开(公告)号：US5008210A

公开(公告)日：1991-04-16

申请号：US510637

申请日：1990-04-18

申请人： Shang-yi Chiang ,  Wen-Ling M. Huang ,  Clifford I. Drowley ,  Paul V. Voorde

发明人： Shang-yi Chiang ,  Wen-Ling M. Huang ,  Clifford I. Drowley ,  Paul V. Voorde

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/10 ,  H01L29/732

CPC分类号： H01L29/66272 ,  H01L29/0649 ,  H01L29/1004 ,  H01L29/732 ,  Y10S148/011

摘要： This invention pertains to a self-aligned trench-isolated emitter structure and the method for forming same. The emitter structure comprises a portion of a bipolar transistor which exhibits improved function due to the emitter structure. A single layer of conductive material forms both the emitter and base contacts in the transistor structure, which structure has particularly shallow emitter and base junctions (about 0.15 micrometer or less). The self-aligned emitter contact, isolated from the base contact by a dielectric filled trench, permits overall size reduction of the device, whereby junction area and accompanying leakage across junctions is reduced. In addition, when the structure of the bipolar transistor is such that the trench isolates the emitter area from both the base contact and the extrinsic base, it is possible to provide improved base conductivity without generating peripheral transistor effects. The bipoloar transistor can be either N-P-N type or P-N-P type depending on the materials of fabrication, although high speed devices are typically of the N-P-N type. The method includes forming a sidewall spacer (246), creating an etch-masking layer (250), removing the spacer, and etching an isolation trench at the location previously occupied by the spacer.

摘要翻译： 本发明涉及自对准沟槽隔离发射极结构及其形成方法。 发射极结构包括双极晶体管的一部分，其由于发射极结构而表现出改善的功能。 单层导电材料在晶体管结构中形成发射极和基极触点，该结构具有特别浅的发射极和基极结（约0.15微米或更小）。 通过介质填充的沟槽与基极接触隔离的自对准发射极接触允许器件的整体尺寸减小，从而降低了接合面积和相邻的接合泄漏。 此外，当双极晶体管的结构使得沟槽将发射极区域与基极接触和非本征基极隔离时，可以提供改进的基极导电性而不产生周边晶体管效应。 尽管高速器件通常是N-P-N型，但双酚晶体管可以是N-P-N型或P-N-P型，这取决于制造材料。 该方法包括形成侧壁间隔物（246），产生蚀刻掩模层（250），去除间隔物，以及在先前由间隔物占据的位置处蚀刻隔离沟槽。

公开(公告)号：US20080014673A1

公开(公告)日：2008-01-17

申请号：US11456291

申请日：2006-07-10

申请人： Shang-Yi CHIANG ,  Chung WANG ,  Shou-Gwo WUU ,  Dun-Nian YAUNG

发明人： Shang-Yi CHIANG ,  Chung WANG ,  Shou-Gwo WUU ,  Dun-Nian YAUNG

IPC分类号： H01L21/00

CPC分类号： H01L27/14623 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/148

摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.

摘要翻译： 本公开提供了一种图像传感器半导体器件。 半导体器件包括具有前表面和后表面的衬底; 形成在所述基板的前表面上的多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向所述后表面的光; 以及形成在所述基板中并且水平放置在所述多个传感器元件的两个相邻元件之间并且垂直地位于所述背表面和所述多个传感器元件之间的铝掺杂特征。

公开(公告)号：US5480811A

公开(公告)日：1996-01-02

申请号：US876663

申请日：1992-04-30

申请人： Shang-Yi Chiang ,  John Moll

发明人： Shang-Yi Chiang ,  John Moll

IPC分类号： H01L27/146 ,  H01L21/24 ,  H01L21/76 ,  H01L31/10

CPC分类号： H01L21/24 ,  H01L21/76

摘要： A photosensing array and a method of making the same wherein the array includes a semiconductor substrate having collecting regions and recrystallized regions. Each collecting region is operatively associated with a photosensing element. Adjacent collecting regions are separated by a recrystallized region. The recrystallized regions are formed by thermally migrating doping metal into the semiconductor substrate using thermal zone gradient melting. With respect to the collecting regions, the recrystallized regions have a relative conductivity level or a conductivity type such that the recrystallized regions have the property of impeding photogenerated carrier migration from one collecting region to an adjacent collecting region. Preferably, the doping metal is one having a high absorption coefficient to block passage of photons between adjacent collecting regions.

摘要翻译： 光敏阵列及其制造方法，其中阵列包括具有收集区域和重结晶区域的半导体衬底。 每个收集区域与光敏元件可操作地相关联。 相邻的收集区域由再结晶区域分离。 通过使用热区梯度熔融将掺杂金属热迁移到半导体衬底中形成再结晶区域。 对于收集区域，再结晶区域具有相对导电率或导电类型，使得再结晶区域具有阻止光生载流子从一个收集区域迁移到相邻收集区域的性质。 优选地，掺杂金属是具有高吸收系数以阻止光子在相邻的收集区域之间通过的金属。

公开(公告)号：US5252143A

公开(公告)日：1993-10-12

申请号：US837683

申请日：1992-02-18

申请人： Shang-Yi Chiang ,  Theodore I. Kamins

发明人： Shang-Yi Chiang ,  Theodore I. Kamins

IPC分类号： H01L29/08 ,  H01L29/732 ,  H01L29/737 ,  H01L29/00

CPC分类号： H01L29/0821 ,  H01L29/7322 ,  H01L29/7371 ,  Y10S148/011 ,  Y10S148/072

摘要： A pre-processed substrate structure for a semiconductor device. A subcollector layer is spaced apart from a substrate by a dielectric. A relatively small, lightly-doped epitaxial feed-through layer extends through the dielectric between the substrate and the subcollector. A transistor constructed over the subcollector has very low collector-to-substrate capacitance. A plurality of devices on a common substrate are electrically isolated from each other by channel stops formed in the substrate around each device.

摘要翻译： 一种用于半导体器件的预处理衬底结构。 子集电极层通过电介质与衬底间隔开。 相对较小的轻掺杂的外延馈通层延伸穿过衬底和子集电极之间的电介质。 在子集电极上构造的晶体管具有非常低的集电极到衬底电容。 公共衬底上的多个器件通过形成在每个器件周围的衬底中的通道停止来彼此电隔离。