Computer platform memory access control method and system with memory configuration automatic setting capability
    1.
    发明授权
    Computer platform memory access control method and system with memory configuration automatic setting capability 有权
    计算机平台内存访问控制方法和系统具有内存配置自动设置功能

    公开(公告)号:US07360052B2

    公开(公告)日:2008-04-15

    申请号:US11233204

    申请日:2005-09-21

    CPC classification number: G06F12/0646

    Abstract: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

    Abstract translation: 提出了一种计算机平台存储器访问控制方法和系统,其被设计为与诸如网络服务器的计算机平台一起使用,为服务器提供具有存储器配置自动设置能力的存储器访问控制功能,其特征在于 在服务器主板上的存储器控​​制芯片和I / O控制芯片之间的配置数据交换路径的布置,以便允许存储在ICH I / O控制的I / O配置寄存器中的一组存储器指定数据 芯片通过配置数据交换路径映射到存储器控制芯片的存储器配置寄存器,使得可以基于从I / O控制芯片映射的存储器指定数据执行存储器访问动作。 该功能使服务器的运行和网络管理更加高效。

    APPARATUS AND METHOD TO IMPLEMENT A UNIVERSAL 3D IMAGING SYSTEM WITH AUTOMATIC SEARCH FOR 3D COMMUNICATION PROTOCOL
    2.
    发明申请
    APPARATUS AND METHOD TO IMPLEMENT A UNIVERSAL 3D IMAGING SYSTEM WITH AUTOMATIC SEARCH FOR 3D COMMUNICATION PROTOCOL 审中-公开
    实现3D通信协议自动搜索的通用3D成像系统的设备和方法

    公开(公告)号:US20120062562A1

    公开(公告)日:2012-03-15

    申请号:US13232370

    申请日:2011-09-14

    CPC classification number: H04N13/398 H04N13/341 H04N2213/008

    Abstract: An apparatus and method are disclosed to implement a universal 3D (3-Dimensional) image system with automatic search for 3D communication protocol. The apparatus includes a memory to store a plurality of communication protocols. The apparatus further includes a controller operatively coupled to the memory to detect a transmitted communication protocol by comparing the transmitted communication protocol with the plurality of communication protocols stored in the memory of the glasses. In addition, the controller receives and processes the 3D image data based on the transmitted communication protocol.

    Abstract translation: 公开了一种实现具有自动搜索3D通信协议的通用3D(3维)图像系统的装置和方法。 该装置包括存储多个通信协议的存储器。 该装置还包括操作性地耦合到存储器的控制器,用于通过将发送的通信协议与存储在眼镜的存储器中的多个通信协议进行比较来检测所发送的通信协议。 另外,控制器基于发送的通信协议接收并处理3D图像数据。

    Computer platform memory access control method and system with memory configuration automatic setting capability
    3.
    发明申请
    Computer platform memory access control method and system with memory configuration automatic setting capability 有权
    计算机平台内存访问控制方法和系统具有内存配置自动设置功能

    公开(公告)号:US20070067596A1

    公开(公告)日:2007-03-22

    申请号:US11233204

    申请日:2005-09-21

    CPC classification number: G06F12/0646

    Abstract: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

    Abstract translation: 提出了一种计算机平台存储器访问控制方法和系统,其被设计为与诸如网络服务器的计算机平台一起使用,为服务器提供具有存储器配置自动设置能力的存储器访问控制功能,其特征在于 在服务器主板上的存储器控​​制芯片和I / O控制芯片之间的配置数据交换路径的布置,以便允许存储在ICH I / O控制的I / O配置寄存器中的一组存储器指定数据 芯片通过配置数据交换路径映射到存储器控制芯片的存储器配置寄存器,使得可以基于从I / O控制芯片映射的存储器指定数据执行存储器访问动作。 该功能使服务器的运行和网络管理更加高效。

    Methods and systems for generating an MIB file
    6.
    发明授权
    Methods and systems for generating an MIB file 失效
    用于生成MIB文件的方法和系统

    公开(公告)号:US6009431A

    公开(公告)日:1999-12-28

    申请号:US52601

    申请日:1998-03-31

    CPC classification number: H04L41/0213 Y10S707/959 Y10S707/99943

    Abstract: Disclosed is an apparatus for quickly generating an error free MIB file of the type used by a SNMP manager to manage and display error and log trap messages received from agents reporting to said manager. This is accomplished by retrieving data from definition and template libraries to be used in conjunction with a network element database to correctly generate, element by element, a completed MIB file.

    Abstract translation: 公开了一种用于快速生成由SNMP管理器使用的类型的无错误MIB文件来管理和显示从向所述管理器报告的代理接收的错误和日志陷阱消息的装置。 这是通过从定义和模板库检索数据来完成的,以便与网络元素数据库一起使用,以逐个元素正确生成完整的MIB文件。

    Pre-amplifier and a decision feedback equalizer using the same for reducing tap weight variations
    7.
    发明授权
    Pre-amplifier and a decision feedback equalizer using the same for reducing tap weight variations 有权
    前置放大器和使用该预放大器的判决反馈均衡器可以减少分接头重量的变化

    公开(公告)号:US09369313B1

    公开(公告)日:2016-06-14

    申请号:US14634896

    申请日:2015-03-02

    Applicant: Po Shing Yu

    Inventor: Po Shing Yu

    Abstract: The present invention discloses pre-amplifier with a selectable threshold voltage in a decision feedback equalization circuit to reduce tap weight variation. A decision feedback equalization circuit includes a summer circuit and a pre-amplifier with an offset generator, wherein the pre-amplifier includes a pair of differential amplifiers and each biased by a respective current bias and each having first and second output nodes coupled to a supply voltage via a respective resistive element, R. The resistive elements may be implemented, for example, using diode-configured transistors, biased transistors, resistor, or any other active or passive circuitry for establishing a resistance. The inputs of first differential amplifier are coupled to the summer's output. The inputs of second differential amplifier are coupled to a reference voltage circuit that comprised of a resistive element and a respective current DAC (IDAC).

    Abstract translation: 本发明公开了一种在判决反馈均衡电路中具有可选阈值电压的前置放大器,以减小抽头重量变化。 判决反馈均衡电路包括加法电路和具有偏移发生器的前置放大器,其中所述前置放大器包括一对差分放大器,并且每一个由相应的电流偏置偏置,并且每一个具有耦合到电源的第一和第二输出节点 电阻元件可以例如使用二极管配置的晶体管,偏置晶体管,电阻器或用于建立电阻的任何其它有源或无源电路来实现。 第一个差分放大器的输入端与夏天的输出端相连。 第二差分放大器的输入耦合到由电阻元件和相应的电流DAC(IDAC)组成的参考电压电路。

    Programmable current mirror
    8.
    发明授权
    Programmable current mirror 有权
    可编程电流镜

    公开(公告)号:US08405377B2

    公开(公告)日:2013-03-26

    申请号:US12577396

    申请日:2009-10-12

    CPC classification number: G05F3/262

    Abstract: A programmable current mirror a reference transistor, first and second mirror transistors, and a first current bypass. The reference transistor has a source and a gate coupled to a reference current node. The first and second mirror transistors are coupled together in series at a first node. Each of the first and second mirror transistors having gates coupled to each other and to the gate of the reference transistor. The first current bypass including a switch disposed in parallel with the second mirror transistor. The first current bypass is coupled to a source and a drain of the second mirror transistor and to the first node.

    Abstract translation: 可编程电流镜,参考晶体管,第一和第二反射镜晶体管,以及第一电流旁路。 参考晶体管具有耦合到参考电流节点的源极和栅极。 第一和第二反射镜晶体管在第一节点处串联在一起。 第一和第二反射镜晶体管中的每一个具有彼此耦合并且与参考晶体管的栅极耦合的栅极。 第一电流旁路包括与第二反射镜晶体管并联设置的开关。 第一电流旁路耦合到第二反射镜晶体管的源极和漏极以及第一节点。

    PROGRAMMABLE CURRENT MIRROR
    9.
    发明申请
    PROGRAMMABLE CURRENT MIRROR 有权
    可编程电流镜

    公开(公告)号:US20110084682A1

    公开(公告)日:2011-04-14

    申请号:US12577396

    申请日:2009-10-12

    CPC classification number: G05F3/262

    Abstract: A programmable current mirror a reference transistor, first and second mirror transistors, and a first current bypass. The reference transistor has a source and a gate coupled to a reference current node. The first and second mirror transistors are coupled together in series at a first node. Each of the first and second mirror transistors having gates coupled to each other and to the gate of the reference transistor. The first current bypass including a switch disposed in parallel with the second mirror transistor. The first current bypass is coupled to a source and a drain of the second mirror transistor and to the first node.

    Abstract translation: 可编程电流镜,参考晶体管,第一和第二反射镜晶体管,以及第一电流旁路。 参考晶体管具有耦合到参考电流节点的源极和栅极。 第一和第二反射镜晶体管在第一节点处串联在一起。 第一和第二反射镜晶体管中的每一个具有彼此耦合并且与参考晶体管的栅极耦合的栅极。 第一电流旁路包括与第二反射镜晶体管并联设置的开关。 第一电流旁路耦合到第二反射镜晶体管的源极和漏极以及第一节点。

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