公开(公告)号：US07282414B2

公开(公告)日：2007-10-16

申请号：US10909403

申请日：2004-08-03

Applicant: Min-Hung Lee ,  Cheng-Yeh Yu ,  Shing-Chii Lu ,  Chee-Wee Liu

Inventor： Min-Hung Lee ,  Cheng-Yeh Yu ,  Shing-Chii Lu ,  Chee-Wee Liu

IPC: H01L21/336

CPC classification number: H01L21/26506 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7842 ,  Y10S438/938

Abstract: Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.

Abstract translation: 通过离子注入制备压应变硅的制备方法。 将离子注入到含硅衬底中，并且高温处理将离子包含区域的附近转变成应变硅。 还提供了通过该方法制造的晶体管。

公开(公告)号：US07033899B2

公开(公告)日：2006-04-25

申请号：US11018242

申请日：2004-12-22

Applicant: Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

Inventor： Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

IPC: H01L21/8228

CPC classification number: H01L21/823807 ,  H01L21/31155 ,  H01L29/7843

Abstract: A method for fabricating semiconductor device is provided. A high stress layer formed on, under or on both sides of the transistors of the semiconductor device is employed as a cap layer. A specific region is then defined through photo resistor mask, and the stress of the region is changed by ion implanting. Therefore, compressive stress and tensile stress occur on the high stress layer. According the disclosed method, the high stress layer may simultaneously improve the characteristics of the transistors formed on the same wafer. Further, the mobility of the carriers of the device is enhanced.

公开(公告)号：US07091522B2

公开(公告)日：2006-08-15

申请号：US10791816

申请日：2004-03-04

Applicant: Min-Hung Lee ,  Shu Tong Chang ,  Shing Chii Lu ,  Chee-Wee Liu

Inventor： Min-Hung Lee ,  Shu Tong Chang ,  Shing Chii Lu ,  Chee-Wee Liu

IPC: H01L29/15

CPC classification number: H01L29/1054 ,  H01L29/6659

Abstract: A MOSFET structure utilizing strained silicon carbon alloy and fabrication method thereof. The MOSFET structure includes a substrate, a graded SiGe layer, a relaxed buffer layer, a strained silicon carbon alloy channel layer, a gate dielectric layer, a polysilicon gate electrode (or metal gate electrode) and a source/drain region.

Abstract translation: 利用应变硅碳合金的MOSFET结构及其制造方法。 MOSFET结构包括衬底，渐变SiGe层，松弛缓冲层，应变硅碳合金沟道层，栅介质层，多晶硅栅电极（或金属栅电极）和源/漏区。

公开(公告)号：US20060160341A1

公开(公告)日：2006-07-20

申请号：US11140952

申请日：2005-06-01

Applicant: Cha-Hsin Lin ,  Zing-Way Pei ,  Ming-Jinn Tsai ,  Shing-Chii Lu

Inventor： Cha-Hsin Lin ,  Zing-Way Pei ,  Ming-Jinn Tsai ,  Shing-Chii Lu

IPC: H01L21/8238 ,  H01L21/3205

CPC classification number: H01L21/265 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/78 ,  H01L29/7843

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a semiconductor device formed with a plurality of transistors; forming a first stress layer with a plurality of layers on the semiconductor device; forming a second stress layer with a plurality of layers on another surface of the semiconductor device; covering photo resist on a region of the first stress layer to cover at least one of the transistors; and performing ion implantation on the part of the semiconductor device that is not covered by the photo resist. In another embodiment, the second stress layers can be formed after the ion implantation. The method can simultaneously enhance the device performance of the PMOS and NMOS on the same wafer. It also solves the problem of procedure integration caused by the produced compressive stress and tensile stress.

公开(公告)号：US07347228B2

公开(公告)日：2008-03-25

申请号：US11300481

申请日：2005-12-15

Applicant: Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

Inventor： Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

IPC: H01L21/331

CPC classification number: H01L21/823807 ,  H01L21/31155 ,  H01L29/7843

Abstract: A method for fabricating semiconductor device is provided. A high stress layer formed on, under or on both sides of the transistors of the semiconductor device is employed as a cap layer. A specific region is then defined through photo resistor mask, and the stress of the region is changed by ion implanting. Therefore, compressive stress and tensile stress occur on the high stress layer. According the disclosed method, the high stress layer may simultaneously improve the characteristics of the transistors formed on the same wafer. Further, the mobility of the carriers of the device is enhanced.

Abstract translation: 提供一种制造半导体器件的方法。 在半导体器件的晶体管的两面上形成的高应力层用作盖层。 然后通过光电阻掩模限定特定区域，并且通过离子注入改变该区域的应力。 因此，在高应力层上产生压缩应力和拉伸应力。 根据所公开的方法，高应力层可以同时改善在同一晶片上形成的晶体管的特性。 此外，装置的载体的移动性增强。

公开(公告)号：US20080023733A1

公开(公告)日：2008-01-31

申请号：US11860362

申请日：2007-09-24

Applicant: Min-Hung LEE ,  Cheng-Yeh Yu ,  Shing-Chii Lu ,  Chee-Wee Liu

Inventor： Min-Hung LEE ,  Cheng-Yeh Yu ,  Shing-Chii Lu ,  Chee-Wee Liu

IPC: H01L29/78

CPC classification number: H01L21/26506 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7842 ,  Y10S438/938

Abstract: Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.

Abstract translation: 通过离子注入制备压应变硅的制备方法。 将离子注入到含硅衬底中，并且高温处理将离子包含区域的附近转变为应变硅。 还提供了通过该方法制造的晶体管。

公开(公告)号：US07521305B2

公开(公告)日：2009-04-21

申请号：US11140952

申请日：2005-06-01

Applicant: Cha-Hsin Lin ,  Zing-Way Pei ,  Ming-Jinn Tsai ,  Shing-Chii Lu

Inventor： Cha-Hsin Lin ,  Zing-Way Pei ,  Ming-Jinn Tsai ,  Shing-Chii Lu

IPC: H01L21/8234

CPC classification number: H01L21/265 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/78 ,  H01L29/7843

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a semiconductor device formed with a plurality of transistors; forming a first stress layer with a plurality of layers on the semiconductor device; forming a second stress layer with a plurality of layers on another surface of the semiconductor device; covering photo resist on a region of the first stress layer to cover at least one of the transistors; and performing ion implantation on the part of the semiconductor device that is not covered by the photo resist. In another embodiment, the second stress layers can be formed after the ion implantation. The method can simultaneously enhance the device performance of the PMOS and NMOS on the same wafer. It also solves the problem of procedure integration caused by the produced compressive stress and tensile stress.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：提供形成有多个晶体管的半导体器件; 在所述半导体器件上形成具有多个层的第一应力层; 在所述半导体器件的另一表面上形成具有多个层的第二应力层; 覆盖所述第一应力层的区域上的光致抗蚀剂以覆盖所述晶体管中的至少一个; 并且对半导体器件的未被光致抗蚀剂覆盖的部分进行离子注入。 在另一个实施例中，可以在离子注入之后形成第二应力层。 该方法可以同时提高同一晶片上的PMOS和NMOS的器件性能。 它也解决了由产生的压缩应力和拉伸应力引起的程序整合问题。

公开(公告)号：US20060094135A1

公开(公告)日：2006-05-04

申请号：US11300481

申请日：2005-12-15

Applicant: Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

Inventor： Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

IPC: H01L21/66

CPC classification number: H01L21/823807 ,  H01L21/31155 ,  H01L29/7843

Abstract: A method for fabricating semiconductor device is provided. A high stress layer formed on, under or on both sides of the transistors of the semiconductor device is employed as a cap layer. A specific region is then defined through photo resistor mask, and the stress of the region is changed by ion implanting. Therefore, compressive stress and tensile stress occur on the high stress layer. According the disclosed method, the high stress layer may simultaneously improve the characteristics of the transistors formed on the same wafer. Further, the mobility of the carriers of the device is enhanced.

公开(公告)号：US20060040479A1

公开(公告)日：2006-02-23

申请号：US11018242

申请日：2004-12-22

Applicant: Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

Inventor： Cha-Hsin Lin ,  Zing-Way Pei ,  Shing-Chii Lu ,  Wen-Yi Hsieh

IPC: H01L21/04

CPC classification number: H01L21/823807 ,  H01L21/31155 ,  H01L29/7843

Abstract: A method for fabricating semiconductor device is provided. A high stress layer formed on, under or on both sides of the transistors of the semiconductor device is employed as a cap layer. A specific region is then defined through photo resistor mask, and the stress of the region is changed by ion implanting. Therefore, compressive stress and tensile stress occur on the high stress layer. According the disclosed method, the high stress layer may simultaneously improve the characteristics of the transistors formed on the same wafer. Further, the mobility of the carriers of the device is enhanced.

Abstract translation: 提供一种制造半导体器件的方法。 在半导体器件的晶体管的两面上形成的高应力层用作盖层。 然后通过光电阻掩模限定特定区域，并且通过离子注入改变该区域的应力。 因此，在高应力层上产生压缩应力和拉伸应力。 根据所公开的方法，高应力层可以同时改善在同一晶片上形成的晶体管的特性。 此外，装置的载体的移动性增强。

公开(公告)号：US20050258460A1

公开(公告)日：2005-11-24

申请号：US10909403

申请日：2004-08-03

Applicant: Min-Hung Lee ,  Cheng-Yeh Yu ,  Shing-Chii Lu ,  Chee-Wee Liu

Inventor： Min-Hung Lee ,  Cheng-Yeh Yu ,  Shing-Chii Lu ,  Chee-Wee Liu

IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/76 ,  H01L29/78 ,  H01L29/84 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L21/26506 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7842 ,  Y10S438/938

Abstract: Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.

Abstract translation: 通过离子注入制备压应变硅的制备方法。 将离子注入到含硅衬底中，并且高温处理将离子包含区域的附近转变成应变硅。 还提供了通过该方法制造的晶体管。