公开(公告)号：US20180285158A1

公开(公告)日：2018-10-04

申请号：US15477026

申请日：2017-04-01

申请人： Abhishek R. Appu ,  Altug Koker ,  Balaji Vembu ,  Joydeep Ray ,  Kamal Sinha ,  Prasoonkumar Surti ,  Kiran C. Veernapu ,  Subramaniam Maiyuran ,  Sanjeev S. Jahagirdar ,  Eric J. Asperheim ,  Guei-Yuan Lueh ,  David Puffer ,  Wenyin Fu ,  Nikos Kaburlasos ,  Bhushan M. Borole ,  Josh B. Mastronarde ,  Linda L. Hurd ,  Travis T. Schluessler ,  Tomasz Janczak ,  Abhishek Venkatesh ,  Kai Xiao ,  Slawomir Grajewski

发明人： Abhishek R. Appu ,  Altug Koker ,  Balaji Vembu ,  Joydeep Ray ,  Kamal Sinha ,  Prasoonkumar Surti ,  Kiran C. Veernapu ,  Subramaniam Maiyuran ,  Sanjeev S. Jahagirdar ,  Eric J. Asperheim ,  Guei-Yuan Lueh ,  David Puffer ,  Wenyin Fu ,  Nikos Kaburlasos ,  Bhushan M. Borole ,  Josh B. Mastronarde ,  Linda L. Hurd ,  Travis T. Schluessler ,  Tomasz Janczak ,  Abhishek Venkatesh ,  Kai Xiao ,  Slawomir Grajewski

IPC分类号： G06F9/50 ,  G06T1/60 ,  G06T1/20 ,  G06T15/00 ,  G06F9/48 ,  G06F1/32

摘要： In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.