-
公开(公告)号:US20170178277A1
公开(公告)日:2017-06-22
申请号:US15089270
申请日:2016-04-01
申请人: SAURABH SHARMA , ABHISHEK VENKATESH , TRAVIS T. SCHLUESSLER , THOMAS F. RAOUX , RAHUL P. SATHE , JON HASSELGREN
发明人: SAURABH SHARMA , ABHISHEK VENKATESH , TRAVIS T. SCHLUESSLER , THOMAS F. RAOUX , RAHUL P. SATHE , JON HASSELGREN
CPC分类号: G06T1/20 , G06F8/41 , G06F9/38 , G06T15/005
摘要: Techniques to improve graphics processing unit (GPU) performance by introducing specialized code paths to process frequent common values are described. A shader compiler can determine instruction that, during operation, may output a common value and can introduce an enhanced shader instruction branch to process the common value to reduce overall computational requirements to execute the shader.
-
公开(公告)号:US20150379669A1
公开(公告)日:2015-12-31
申请号:US14319452
申请日:2014-06-30
申请人: Abhishek Venkatesh
发明人: Abhishek Venkatesh
CPC分类号: G06T1/20
摘要: Various embodiments are generally directed to an apparatus, method and other techniques to determine that a shared surface is shared between a first application and a second application, determine that a fast clear operation has been performed on the shared surface, the fast clear operation comprising clearing one or more locations of one or more buffers. Further, various embodiments may include writing pixel value information to the one or more locations of the one or more buffers and performing a resolve operation on the shared surface.
摘要翻译: 各种实施例通常涉及用于确定共享表面在第一应用和第二应用之间共享的装置,方法和其他技术,确定已在共享表面上执行快速清除操作,快速清除操作包括清除 一个或多个缓冲区的一个或多个位置。 此外,各种实施例可以包括将像素值信息写入到一个或多个缓冲器的一个或多个位置并且在共享表面上执行解析操作。
-
公开(公告)号:US20190244418A1
公开(公告)日:2019-08-08
申请号:US16269270
申请日:2019-02-06
申请人: Prasoonkumar Surti , Karthik Vaidyanathan , Murali Ramadoss , Michael Apodaca , Abhishek Venkatesh , Devan Burke , Philip R. Laws , Subramaniam Maiyuran , Abhishek R. Appu , ElMoustapha Ould-Ahmed-Vall , Peter L. Doyle
发明人: Prasoonkumar Surti , Karthik Vaidyanathan , Murali Ramadoss , Michael Apodaca , Abhishek Venkatesh , Devan Burke , Philip R. Laws , Subramaniam Maiyuran , Abhishek R. Appu , ElMoustapha Ould-Ahmed-Vall , Peter L. Doyle
CPC分类号: G06T15/80 , G06F9/50 , G06F9/5011 , G06T1/20 , G06T5/20
摘要: An embodiment of a conditional shader apparatus may include a conditional pixel shader to determine if one or more pixels meet a shader condition, and a pixel regrouper communicatively coupled to the conditional pixel shader to regroup pixels based on whether the one or more pixels are determined to meet the shader condition. Another embodiment of a conditional shader apparatus may include a thread analyzer to determine if a set of threads meet a thread condition, and a conditional kernel loader communicatively coupled to the thread analyzer to load an appropriate kernel from a set of two or more kernels based on whether the set of threads are determined to meet the thread condition. Other embodiments are disclosed and claimed.
-
公开(公告)号:US20180285158A1
公开(公告)日:2018-10-04
申请号:US15477026
申请日:2017-04-01
申请人: Abhishek R. Appu , Altug Koker , Balaji Vembu , Joydeep Ray , Kamal Sinha , Prasoonkumar Surti , Kiran C. Veernapu , Subramaniam Maiyuran , Sanjeev S. Jahagirdar , Eric J. Asperheim , Guei-Yuan Lueh , David Puffer , Wenyin Fu , Nikos Kaburlasos , Bhushan M. Borole , Josh B. Mastronarde , Linda L. Hurd , Travis T. Schluessler , Tomasz Janczak , Abhishek Venkatesh , Kai Xiao , Slawomir Grajewski
发明人: Abhishek R. Appu , Altug Koker , Balaji Vembu , Joydeep Ray , Kamal Sinha , Prasoonkumar Surti , Kiran C. Veernapu , Subramaniam Maiyuran , Sanjeev S. Jahagirdar , Eric J. Asperheim , Guei-Yuan Lueh , David Puffer , Wenyin Fu , Nikos Kaburlasos , Bhushan M. Borole , Josh B. Mastronarde , Linda L. Hurd , Travis T. Schluessler , Tomasz Janczak , Abhishek Venkatesh , Kai Xiao , Slawomir Grajewski
摘要: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.
-
5.
公开(公告)号:US20150084949A1
公开(公告)日:2015-03-26
申请号:US14038725
申请日:2013-09-26
申请人: ABHISHEK VENKATESH , ADAM LEIBEL
发明人: ABHISHEK VENKATESH , ADAM LEIBEL
IPC分类号: G06T19/00
CPC分类号: G06T15/005 , H04N13/275
摘要: Various embodiments are generally directed to techniques to generate stereoscopic views of a scene for purposes of providing an illusion of depth to the scene. An apparatus for stereoscopic rendering includes a processor component; a vertex shader to generate a plurality of vertices corresponding to primitives that are a representation of the scene to be displayed, the vertex shader transforming a first instance of the plurality of vertices to a first projected space in a first portion of a two-dimensional (2D) area and transforming a second instance of the plurality of vertices to a second projected space in the 2D area, the first portion of the 2D area corresponding to a first stereoscopic view of the scene and the second portion of the 2D area corresponding to a second stereoscopic view of the scene.
摘要翻译: 为了向场景提供深度幻觉的目的,各种实施例通常涉及产生场景的立体视图的技术。 用于立体渲染的装置包括处理器组件; 顶点着色器,用于生成对应于要显示的场景的表示的原语的多个顶点,所述顶点着色器将所述多个顶点的第一实例变换为二维的第一部分中的第一投影空间( 2D)区域并将多个顶点的第二实例变换为2D区域中的第二投影空间,2D区域的第一部分对应于场景的第一立体视图,2D区域的第二部分对应于 场景的第二立体视图。
-
-
-
-