公开(公告)号：US20100181549A1

公开(公告)日：2010-07-22

申请号：US12687276

申请日：2010-01-14

申请人： Song-Yi Kim ,  Heung-Jin Joo ,  Dae-Hwan Kang ,  Ji-Hyun Jeong ,  Jun-Hyok Kong

发明人： Song-Yi Kim ,  Heung-Jin Joo ,  Dae-Hwan Kang ,  Ji-Hyun Jeong ,  Jun-Hyok Kong

IPC分类号： H01L47/00

CPC分类号： H01L45/1625 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/144

摘要： A PRAM device may include an insulating interlayer, a diode, a metal silicide layer, a barrier spacer, an outer spacer, a lower electrode, a phase-changeable layer and an upper electrode. The insulating interlayer may be formed on a substrate. The insulating interlayer may have a contact hole. The diode may be formed in the contact hole. The metal silicide layer may be formed on the diode. The barrier spacer may be formed on an upper surface of the metal silicide layer and a side surface of the contact hole. The outer spacer may be formed on the barrier spacer. The lower electrode may be formed on the barrier spacer. The phase-changeable layer may be formed on the lower electrode. The upper electrode may be formed on the phase-changeable layer.

摘要翻译： PRAM器件可以包括绝缘中间层，二极管，金属硅化物层，隔离隔离物，外隔离物，下电极，相变层和上电极。 绝缘中间层可以形成在基板上。 绝缘中间层可以具有接触孔。 二极管可以形成在接触孔中。 金属硅化物层可以形成在二极管上。 隔离间隔物可以形成在金属硅化物层的上表面和接触孔的侧表面上。 外隔离物可以形成在隔离隔离物上。 下电极可以形成在阻挡间隔物上。 相变层可以形成在下电极上。 上电极可以形成在相变层上。

公开(公告)号：US20050237406A1

公开(公告)日：2005-10-27

申请号：US11096926

申请日：2005-03-30

申请人： Song-Yi Kim ,  Chang-Min Bae ,  Nam-Ryeol Kim ,  Hack-Soo Oh

发明人： Song-Yi Kim ,  Chang-Min Bae ,  Nam-Ryeol Kim ,  Hack-Soo Oh

IPC分类号： H01L27/146 ,  H04N5/335 ,  H04N5/357 ,  H04N5/363 ,  H04N5/374 ,  H04N5/378 ,  H04N9/04 ,  H04N9/07 ,  H04N5/217

CPC分类号： H04N9/045 ,  H04N2209/045

摘要： A CMOS image sensor is provided. In the CMOS image sensor, a pixel array has a plurality of first color pixels, a plurality of second color pixels and a plurality of third color pixels, which are arranged in matrix form. A CDS (correlated double sampling) part has CDS circuits to receive output signals of the pixels, one CDS circuit per column being provided. A plurality of analog data buses receive divided output signal of the CDS circuits. An ASP (analog signal processor) is connected to the plurality of analog data buses.

摘要翻译： 提供CMOS图像传感器。 在CMOS图像传感器中，像素阵列具有以矩阵形式布置的多个第一彩色像素，多个第二彩色像​​素和多个第三彩色像素。 CDS（相关双采样）部分具有CDS电路以接收像素的输出信号，每列提供一个CDS电路。 多个模拟数据总线接收CDS电路的分频输出信号。 ASP（模拟信号处理器）连接到多个模拟数据总线。

公开(公告)号：US20120013774A1

公开(公告)日：2012-01-19

申请号：US13242615

申请日：2011-09-23

申请人： Nam-Ryeol Kim ,  Song-YI Kim ,  Chang-Min Bae ,  Hack-Soo Oh

发明人： Nam-Ryeol Kim ,  Song-YI Kim ,  Chang-Min Bae ,  Hack-Soo Oh

IPC分类号： H04N9/64 ,  H04N9/04

CPC分类号： H04N5/3742 ,  H04N5/361 ,  H04N5/3728 ,  H04N9/045

摘要： A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

摘要翻译： CMOS图像传感器包括：用于处理对应于不同路径上的相同颜色的像素的输出信号的多个CDS / PGA（相关双采样/可编程增益放大器） 以及偏移差去除部，用于去除在不同路径上处理相同的颜色信号时发生的偏移差，其中所述偏移差除去部包括：屏蔽光的虚拟像素阵列; 用于通过CDS / PGA读取虚拟像素阵列的信号并存储每个路径的平均偏移值的单元; 以及信号合成单元，用于合成通过各个CDS / PGA读取的有效像素阵列的平均偏移值和信号，并输出消除了偏移差的信号。

公开(公告)号：US08045029B2

公开(公告)日：2011-10-25

申请号：US11114386

申请日：2005-04-25

申请人： Nam-Ryeol Kim ,  Song-Yi Kim ,  Chang-Min Bae ,  Hack-Soo Oh

发明人： Nam-Ryeol Kim ,  Song-Yi Kim ,  Chang-Min Bae ,  Hack-Soo Oh

IPC分类号： H04N5/217 ,  H04N9/64 ,  H04N3/14

CPC分类号： H04N5/3742 ,  H04N5/361 ,  H04N5/3728 ,  H04N9/045

摘要： A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

摘要翻译： CMOS图像传感器包括：用于处理对应于不同路径上的相同颜色的像素的输出信号的多个CDS / PGA（相关双采样/可编程增益放大器） 以及偏移差去除部，用于去除在不同路径上处理相同的颜色信号时发生的偏移差，其中所述偏移差除去部包括：屏蔽光的虚拟像素阵列; 用于通过CDS / PGA读取虚拟像素阵列的信号并存储每个路径的平均偏移值的单元; 以及信号合成单元，用于合成通过各个CDS / PGA读取的有效像素阵列的平均偏移值和信号，并输出消除了偏移差的信号。

公开(公告)号：US20100183150A1

公开(公告)日：2010-07-22

申请号：US12384173

申请日：2009-03-31

申请人： Sung-jin Lee ,  Seung-joo Kim ,  Dong-ho Won ,  Dong-hyun Choi ,  Kwang-woo Lee ,  Byung-hee Lee ,  Han-jae Jeong ,  Woong-ryul Jeon ,  Soon-haeng Hur ,  Wook-jae Cha ,  Sung-kyu Cho ,  Hyun-sang Park ,  Hyoung-seob Lee ,  Hyun-seung Lee ,  Song-yi Kim ,  Young-jun Cho

发明人： Sung-jin Lee ,  Seung-joo Kim ,  Dong-ho Won ,  Dong-hyun Choi ,  Kwang-woo Lee ,  Byung-hee Lee ,  Han-jae Jeong ,  Woong-ryul Jeon ,  Soon-haeng Hur ,  Wook-jae Cha ,  Sung-kyu Cho ,  Hyun-sang Park ,  Hyoung-seob Lee ,  Hyun-seung Lee ,  Song-yi Kim ,  Young-jun Cho

IPC分类号： H04L9/08

CPC分类号： H04L9/0836 ,  H04L9/0822 ,  H04L9/0861

摘要： A shared key management method for a Supervisory Control And Data Acquisition (SCADA) system in which a master terminal unit (MTU), a plurality of sub master terminal units (SUB-MTUs), and a plurality of remote terminal units (RTUs) are configured in a sequential hierarchy, is provided. The method includes: (a) at the MTU, generating a plurality of secret keys and respectively allocating the secret keys to the RTUs; (b) at the MTU, generating a group key in a tree structure, wherein a leaf node of the tree structure corresponds to each RTU, a parent node of a node corresponding to an RTU corresponds to a SUB-RTU to which the RTU is connected, a shared key of each node of the group key is generated by hashing shared keys of all child nodes, and a shared key of a leaf node of the group key is set as a secret key of the RTU; (c) at the RTU or the SUM-MTU, receiving and storing shared keys of every node from a node corresponding to itself to a root node; (d) when the RTU or the SUM-MTU is added or deleted, at the MTU, generating shared keys of nodes along a path from a node corresponding to the added or deleted terminal unit to the root node again; and (e) at the RTU or the SUB-MTU, receiving and storing the generated shared keys. According to the key management method for the SCADA system described above, in the case of encrypting and broadcasting or multicasting a message, a computation amount can be reduced.

摘要翻译： 一种用于监控和数据采集（SCADA）系统的共享密钥管理方法，其中主终端单元（MTU），多个子主站终端单元（SUB-MTU）和多个远程终端单元（RTU）是 被提供在顺序层次结构中。 该方法包括：（a）在MTU处，产生多个秘密密钥，并分别向RTU分配秘密密钥; （b）在MTU中生成树结构中的组密钥，其中树结构的叶节点对应于每个RTU，对应于RTU的节点的父节点对应于RTU所在的SUB-RTU 通过对所有子节点的共享密钥进行散列生成组密钥的每个节点的共享密钥，并且将组密钥的叶节点的共享密钥设置为RTU的秘密密钥; （c）在RTU或SUM-MTU处，从与其自身相对应的节点的根节点接收和存储每个节点的共享密钥; （d）当在MTU处添加或删除RTU或SUM-MTU时，沿着从对应于添加或删除的终端单元的节点的路径生成节点的共享密钥再次到根节点; 和（e）在RTU或SUB-MTU处，接收和存储所生成的共享密钥。 根据上述SCADA系统的密钥管理方法，在加密和广播或组播消息的情况下，可以减少计算量。

公开(公告)号：US08686393B2

公开(公告)日：2014-04-01

申请号：US13349714

申请日：2012-01-13

申请人： Jihyung Yu ,  Daewon Ha ,  Song yi Kim

发明人： Jihyung Yu ,  Daewon Ha ,  Song yi Kim

IPC分类号： H01L29/06

CPC分类号： H01L27/2472 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

摘要： An integrated circuit device may include a semiconductor substrate including an active region and a transistor in the active region. The transistor may include first and second spaced apart source/drain regions in the active region of the semiconductor substrate, and a semiconductor channel region between the first and second source/drain regions. The semiconductor channel region may include a plurality of channel trenches therein between the first and second source/drain regions. A gate insulating layer may be provided on the channel region including sidewalls of the plurality of channel trenches, and a gate electrode may be provided on the gate insulating layer so that the gate insulating layer is between the gate electrode and the semiconductor channel region including the plurality of channel trenches. Related methods are also discussed.

摘要翻译： 集成电路器件可以包括在有源区域中包括有源区和晶体管的半导体衬底。 晶体管可以包括半导体衬底的有源区域中的第一和第二间隔开的源极/漏极区域，以及在第一和第二源极/漏极区域之间的半导体沟道区域。 半导体沟道区可以在第一和第二源极/漏极区之间包括多个沟道沟槽。 可以在包括多个沟道沟槽的侧壁的沟道区域上设置栅极绝缘层，并且可以在栅极绝缘层上设置栅极电极，使得栅极绝缘层在包括栅极电极和半导体沟道区域之间 多个通道沟槽。 还讨论了相关方法。

公开(公告)号：US20120248400A1

公开(公告)日：2012-10-04

申请号：US13349714

申请日：2012-01-13

申请人： Jihyung Yu ,  Daewon Ha ,  Song yi Kim

发明人： Jihyung Yu ,  Daewon Ha ,  Song yi Kim

IPC分类号： H01L47/00

CPC分类号： H01L27/2472 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

摘要： An integrated circuit device may include a semiconductor substrate including an active region and a transistor in the active region. The transistor may include first and second spaced apart source/drain regions in the active region of the semiconductor substrate, and a semiconductor channel region between the first and second source/drain regions. The semiconductor channel region may include a plurality of channel trenches therein between the first and second source/drain regions. A gate insulating layer may be provided on the channel region including sidewalls of the plurality of channel trenches, and a gate electrode may be provided on the gate insulating layer so that the gate insulating layer is between the gate electrode and the semiconductor channel region including the plurality of channel trenches. Related methods are also discussed.

摘要翻译： 集成电路器件可以包括在有源区域中包括有源区和晶体管的半导体衬底。 晶体管可以包括半导体衬底的有源区域中的第一和第二间隔开的源极/漏极区域，以及在第一和第二源极/漏极区域之间的半导体沟道区域。 半导体沟道区可以在第一和第二源极/漏极区之间包括多个沟道沟槽。 可以在包括多个沟道沟槽的侧壁的沟道区域上设置栅极绝缘层，并且可以在栅极绝缘层上设置栅极电极，使得栅极绝缘层在包括栅极电极和半导体沟道区域之间 多个通道沟槽。 还讨论了相关方法。

公开(公告)号：US20050253947A1

公开(公告)日：2005-11-17

申请号：US11114386

申请日：2005-04-25

申请人： Nam-Ryeol Kim ,  Song-Yi Kim ,  Chang-Min Bae ,  Hack-Soo Oh

发明人： Nam-Ryeol Kim ,  Song-Yi Kim ,  Chang-Min Bae ,  Hack-Soo Oh

IPC分类号： H01L27/146 ,  H01L27/14 ,  H04N5/335 ,  H04N5/361 ,  H04N5/374 ,  H04N5/378 ,  H04N9/04 ,  H04N9/07 ,  H04N5/217

CPC分类号： H04N5/3742 ,  H04N5/361 ,  H04N5/3728 ,  H04N9/045

摘要： A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed.

摘要翻译： CMOS图像传感器包括：用于处理对应于不同路径上的相同颜色的像素的输出信号的多个CDS / PGA（相关双采样/可编程增益放大器） 以及偏移差去除部，用于去除在不同路径上处理相同的颜色信号时发生的偏移差，其中所述偏移差除去部包括：屏蔽光的虚拟像素阵列; 用于通过CDS / PGA读取虚拟像素阵列的信号并存储每个路径的平均偏移值的单元; 以及信号合成单元，用于合成通过各个CDS / PGA读取的有效像素阵列的平均偏移值和信号，并输出消除了偏移差的信号。