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    Semiconductor memory devices
    1.
    发明授权
    Semiconductor memory devices 有权

    公开(公告)号：US10141502B2

    公开(公告)日：2018-11-27

    申请号：US15418250

    申请日：2017-01-27

    申请人： Il-Mok Park ,  Dae-Hwan Kang ,  Gwan-Hyeob Koh

    发明人： Il-Mok Park ,  Dae-Hwan Kang ,  Gwan-Hyeob Koh

    IPC分类号： H01L47/00 ,  H01L45/00 ,  H01L27/22 ,  H01L27/24 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

    摘要： Disclosed are a semiconductor memory device and a method of manufacturing the same. A first conductive line extends in a first direction on a substrate and has a plurality of protrusions and recesses that are alternately formed thereon. A second conductive line is arranged over the first conductive line in a second direction such that the first and the second conductive lines cross at the protrusions. A plurality of memory cell structures is positioned on the protrusions of the first conductive line and is contact with the second conductive line. A thermal insulating plug is positioned on the recesses of the first conductive line and reduces heat transfer between a pair of the neighboring cell structures in the first direction. Accordingly, the heat cross talk is reduced between the neighboring cell structures along the conductive line.

    VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    3.
    发明申请
    VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20170237000A1

    公开(公告)日：2017-08-17

    申请号：US15346751

    申请日：2016-11-09

    申请人： Masayuki TERAI ,  Dae-Hwan KANG ,  Gwan-Hyeob KOH

    发明人： Masayuki TERAI ,  Dae-Hwan KANG ,  Gwan-Hyeob KOH

    IPC分类号： H01L45/00

    摘要： A variable resistance memory device and a method of manufacturing the same, the device including first conductive lines disposed in a first direction on a substrate, each of the first conductive lines extending in a second direction crossing the first direction, and the first and second directions being parallel to a top surface of the substrate; second conductive lines disposed in the second direction over the first conductive lines, each of the second conductive lines extending in the first direction; a memory unit between the first and second conductive lines, the memory unit being in each area overlapping the first and second conductive lines in a third direction substantially perpendicular to the top surface of the substrate, and the memory unit including a variable resistance pattern; and an insulation layer structure between the first and second conductive lines, the insulation layer structure covering the memory unit and including an air gap in at least a portion of an area overlapping neither the first conductive lines nor the second conductive lines in the third direction.

    Phase-change random access memory device
    5.
    发明申请
    Phase-change random access memory device 审中-公开
    相变随机存取存储器件

    公开(公告)号：US20100243981A1

    公开(公告)日：2010-09-30

    申请号：US12730460

    申请日：2010-03-24

    申请人： Dae-Hwan Kang ,  Jung-Hoon Park

    发明人： Dae-Hwan Kang ,  Jung-Hoon Park

    IPC分类号： H01L45/00

    CPC分类号： H01L45/1273 ,  G11C13/0004 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675

    摘要： A phase-change random access memory device includes an isolation layer structure, an insulating interlayer, a spacer, a switching element and a phase-change material (PCM) layer. The isolation layer structure is in a trench on a substrate, defines an active region in the substrate, and has a recess at an upper portion thereof. The insulating interlayer has an opening partially exposing the active region and the isolation layer structure. The spacer is on a sidewall of the opening and fills the recess. The switching element is in the opening on the exposed active region. The PCM layer is electrically connected to the switching element.

    摘要翻译： 相变随机存取存储器件包括隔离层结构，绝缘中间层，间隔物，开关元件和相变材料（PCM）层。 隔离层结构在衬底上的沟槽中，在衬底中限定有源区，并且在其上部具有凹部。 绝缘中间层具有部分地暴露有源区和隔离层结构的开口。 间隔件位于开口的侧壁上并填充凹部。 开关元件在暴露的有源区域上的开口中。 PCM层与开关元件电连接。

    Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices
    7.
    发明申请
    Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices 有权
    具有受控电阻漂移参数的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US20080316804A1

    公开(公告)日：2008-12-25

    申请号：US12079886

    申请日：2008-03-28

    申请人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Seung-Pil Ko ,  Dong-Won Lim

    发明人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Seung-Pil Ko ,  Dong-Won Lim

    IPC分类号： G11C11/00

    CPC分类号： G11C11/5678 ,  G11C11/56 ,  G11C13/0004 ,  G11C13/0033 ,  G11C16/3427

    摘要： In a method of controlling resistance drift in a memory cell of a resistance-changeable material memory device, the resistance changeable material in the memory cell is treated so that a drift parameter for the memory cell is less than about 0.18, wherein a change in resistance of a memory cell over the time period is determined according to the relationship: Rdrift=Rinitial×tα; where Rdrift represents a final resistance of the memory cell following the time period, Rinitial represents the initial resistance of the memory cell following the programming operation, t represents the time period; and α represents the drift parameter.

    摘要翻译： 在电阻可变材料存储装置的存储单元中控制电阻漂移的方法中，对存储单元中的电阻变化材料进行处理，使得存储单元的漂移参数小于约0.18，其中电阻变化 根据以下关系确定该时间段内的存储单元：<？in-line-formula description =“In-line Formulas”end =“lead”？> Rdrift = Rinitialxtalpha; <？in-line-formula description = “In-Line Formulas”end =“tail”？>其中Rdrift表示在时间段之后的存储单元的最终电阻，Rinitial表示编程操作之后的存储单元的初始电阻，t表示时间段; 而alpha表示漂移参数。

    Non-volatile electrical phase change memory device comprising interfacial control layer and method for the preparation thereof
    10.
    发明授权
    Non-volatile electrical phase change memory device comprising interfacial control layer and method for the preparation thereof 有权
    包含界面控制层的非易失性电相变存储器件及其制备方法

    公开(公告)号：US07851778B2

    公开(公告)日：2010-12-14

    申请号：US11805827

    申请日：2007-05-24

    申请人： Dae-Hwan Kang ,  In-Ho Kim ,  Byung Ki Cheong ,  Jeung-Hyun Jeong ,  Taek Sung Lee ,  Won Mok Kim ,  Ki-Bum Kim

    发明人： Dae-Hwan Kang ,  In-Ho Kim ,  Byung Ki Cheong ,  Jeung-Hyun Jeong ,  Taek Sung Lee ,  Won Mok Kim ,  Ki-Bum Kim

    IPC分类号： H01L47/00 ,  H01L21/00

    CPC分类号： H01L45/1675 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1625

    摘要： The present invention relates to a non-volatile electrical phase change memory device comprising a substrate, a first interlayer dielectric film deposited on the substrate, a bottom electrode layer formed on the first dielectric layer, a second interlayer dielectric film formed on the bottom electrode layer, a phase change material layer deposited on the second interlayer dielectric film, and a top electrode layer formed on said phase change material layer, the bottom electrode layer being brought into contact with the phase change material layer through a contact hole which is formed in the second interlayer dielectric film and filled with the phase change material or bottom electrode material, so that the phase change layer and the bottom electrode layer come into close contact with each other,wherein an interfacial control layer is formed at the interface of the contact hole between the phase change layer and the bottom electrode layer, said interfacial control layer having strong chemical bonds with the phase change material as well as electrical resistivity and thermal conductivity values lower than those of the bottom electrode material.

    摘要翻译： 本发明涉及一种非挥发性电相变存储器件，其包括衬底，沉积在衬底上的第一层间电介质膜，形成在第一介电层上的底部电极层，形成在底部电极层上的第二层间电介质膜 沉积在第二层间电介质膜上的相变材料层和形成在所述相变材料层上的顶部电极层，所述底部电极层通过形成在所述相变材料层中的接触孔与所述相变材料层接触， 第二层间电介质膜，并填充有相变材料或底部电极材料，使得相变层和底部电极层彼此紧密接触，其中界面控制层形成在接触孔的界面处， 相变层和底部电极层，所述界面控制层具有强的作用 与相变材料的化学键以及电阻率和热导率值低于底部电极材料。