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1.发明授权Binding users to a gesture based system and providing feedback to the users 有权将用户绑定到基于手势的系统，并向用户提供反馈公开(公告)号：US09015638B2
公开(公告)日：2015-04-21
申请号：US12434553
申请日：2009-05-01
CPC分类号： A63F13/28 , A63F13/06 , A63F13/213 , A63F13/42 , A63F13/843 , A63F2300/1093 , A63F2300/6045 , G06F3/011 , G06F3/017 , G06F3/0304 , G06F3/04883
摘要： Techniques for managing a set of states associated with a capture device are disclosed herein. The capture device may detect and bind to users, and may provide feedback about whether the capture device is bound to, or detecting a user. Techniques are also disclosed wherein virtual ports may be associated with users bound to a capture device and feedback about the state of virtual ports may be provided.
摘要翻译： 本文公开了用于管理与捕获装置相关联的一组状态的技术。 捕获设备可以检测并绑定到用户，并且可以提供关于捕获设备是绑定到还是检测用户的反馈。 还公开了技术，其中虚拟端口可以与绑定到捕获设备的用户相关联，并且可以提供关于虚拟端口的状态的反馈。
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2.发明申请BINDING USERS TO A GESTURE BASED SYSTEM AND PROVIDING FEEDBACK TO THE USERS 有权将用户绑定到基于用户的系统并向用户提供反馈公开(公告)号：US20100281436A1
公开(公告)日：2010-11-04
申请号：US12434553
申请日：2009-05-01
CPC分类号： A63F13/28 , A63F13/06 , A63F13/213 , A63F13/42 , A63F13/843 , A63F2300/1093 , A63F2300/6045 , G06F3/011 , G06F3/017 , G06F3/0304 , G06F3/04883
摘要： Techniques for managing a set of states associated with a capture device are disclosed herein. The capture device may detect and bind to users, and may provide feedback about whether the capture device is bound to, or detecting a user. Techniques are also disclosed wherein virtual ports may be associated with users bound to a capture device and feedback about the state of virtual ports may be provided.
摘要翻译： 本文公开了用于管理与捕获装置相关联的一组状态的技术。 捕获设备可以检测并绑定到用户，并且可以提供关于捕获设备是绑定到还是检测用户的反馈。 还公开了技术，其中虚拟端口可以与绑定到捕获设备的用户相关联，并且可以提供关于虚拟端口的状态的反馈。
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公开(公告)号：US20080235485A1
公开(公告)日：2008-09-25
申请号：US11725922
申请日：2007-03-20
IPC分类号： G06F12/00
CPC分类号： G06F11/1044
摘要： A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and second physical addresses of the memory correspond to memory locations that store data and a corresponding ECC, respectively. The method further comprises translating the logical address into the first and second physical addresses, accessing the data over a data path, separately accessing the ECC over the same data path, and checking the integrity of the data using the ECC.
摘要翻译： 用于在非ECC兼容组件中实现纠错码（ECC）检查的方法和装置。 该方法包括接收逻辑地址，其中逻辑地址映射到存储器的第一和第二物理地址。 存储器的第一和第二物理地址分别对应于存储数据的存储器位置和对应的ECC。 该方法还包括将逻辑地址转换为第一和第二物理地址，通过数据路径访问数据，通过相同数据路径分别访问ECC，以及使用ECC检查数据的完整性。
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4.发明申请Portable computer system having wireless communication functionality and global geographic positioning functionality 审中-公开具有无线通信功能和全球地理定位功能的便携式计算机系统公开(公告)号：US20080004039A1
公开(公告)日：2008-01-03
申请号：US11478737
申请日：2006-06-30
IPC分类号： H04Q7/20
CPC分类号： G06F9/4401 , G06F21/305 , G06F21/6218 , G06F2221/2111 , G06F2221/2143
摘要： A portable computer system including wireless communication functionality and global geographic positioning functionality includes a processor coupled to a wireless module, and a global positioning unit coupled to the wireless module and the processor. The wireless module may communicate with a wireless network via a wireless connection. The global positioning unit may be configured to receive geographic location information and to determine a current geographic location of the portable computer system based upon the received geographic location information. The processor may execute system software that may be configured to reconfigure system configuration settings such as security and authentication settings, and system clock settings, for example, dependent upon changes in the current geographic location information. In addition, an authenticated administrative level user may send one or more commands to the wireless module. The commands may cause a system storage to be made unreadable.
摘要翻译： 包括无线通信功能和全球地理定位功能的便携式计算机系统包括耦合到无线模块的处理器和耦合到无线模块和处理器的全球定位单元。 无线模块可以经由无线连接与无线网络进行通信。 全球定位单元可以被配置为接收地理位置信息，并且基于接收到的地理位置信息来确定便携式计算机系统的当前地理位置。 处理器可以执行系统软件，其可以被配置为重新配置系统配置设置，例如安全性和认证设置，以及系统时钟设置，例如，取决于当前地理位置信息的变化。 此外，经认证的管理级用户可以向无线模块发送一个或多个命令。 命令可能导致系统存储不可读。
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5.发明授权System for checking the acceptance of I/O request to an interface using software visible instruction which provides a status signal and performs operations in response thereto 失效用于使用提供状态信号并执行响应的操作的软件可见指令检查I / O请求对接口的接受性的系统
公开(公告)号：US5682551A
公开(公告)日：1997-10-28
申请号：US25304
申请日：1993-03-02
CPC分类号： G06F13/4027
摘要： An apparatus including a system bus coupled to an I/O interface which includes a pointer register and a rejecting circuit which determines whether a write to the pointer register will be accepted or rejected. The I/O interface is further coupled to at least one I/O bus having at least one I/O device connected thereto. The system bus is further coupled to a main memory and to a Central Processing Unit (CPU) which is capable of executing software instructions, providing a command structure corresponding to an access of an I/O device, and writing to the pointer register an address of a location in main memory of the command structure. The CPU further includes a hardware indicator responsive to the rejecting circuit for providing a status signal indicating the status of a write to the pointer register. The CPU executes the software in accordance with the status signal. The apparatus allows the software being executed by the CPU to software pend accesses to devices not directly connected to the system bus. This improves system performance over non-pended system buses and reduces the amount of hardware needed as compared to pended system buses.
摘要翻译： 一种包括耦合到I / O接口的系统总线的装置，其包括指针寄存器和拒绝电路，所述拒绝电路确定对所述指针寄存器的写入是否被接受或拒绝。 I / O接口进一步耦合到具有至少一个连接到其上的I / O设备的至少一个I / O总线。 系统总线还耦合到主存储器和能够执行软件指令的中央处理单元（CPU），提供与I / O设备的访问相对应的命令结构，并向指针寄存器写入地址 在命令结构的主存储器中的位置。 CPU还包括响应于拒绝电路的硬件指示器，用于提供指示对指针寄存器的写入状态的状态信号。 CPU根据状态信号执行软件。 该装置允许由CPU执行的软件对未直接连接到系统总线的设备进行软件挂起访问。 与系统总线相比，这样可以提高系统性能，并减少所需的硬件数量。
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6.发明授权Modular crossbar interconnection metwork for data transactions between system units in a multi-processor system 失效用于多处理器系统中的系统单元之间的数据交易的模块化交叉开关互连功能
公开(公告)号：US4968977A
公开(公告)日：1990-11-06
申请号：US306336
申请日：1989-02-03
IPC分类号： H04Q3/555 , G06F13/40 , G06F15/173
CPC分类号： G06F15/17375 , G06F13/4022
摘要： For efficiently handling data transactions between various system units (CPUs, I/O units and main memory units) in a multi-processor system, the system units are linked via a plurality of expandable crossbar modules, each providing a set of interconnections or well-defined mappings between the sets of input and output nodes, with each output being defined in terms of only one input. In addition to the nodes provided at the input and output sections, each crossbar module is also provided with discrete input and output expansion portions through which the module may be linked to other identically configured crossbar modules when additional nodes are to be integrated into the system. The expansion ports allow serial linking of crossbar modules so as to establish a connection between source and destination nodes which are spread across different crossbar modules. The serially-linked expansion ports realize direct mapping between all system nodes in the form of a two-stage network; the basic crossbar design remains the same and there is no need for the problematic redesign of crossbar modules for accommodating added data transfer nodes. The modular crossbar design is particularly adapted for use with different system configurations having different numbers of communication nodes and permits a system to be upgraded by adding communication nodes by using additional identically configured crossbar modules.
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公开(公告)号：US08448094B2
公开(公告)日：2013-05-21
申请号：US12411276
申请日：2009-03-25
申请人： Alex Kipman , R. Stephen Polzin , Kudo Tsunoda , Darren Bennett , Stephen Latta , Mark Finocchio , Gregory G. Snook , Relja Markovic
发明人： Alex Kipman , R. Stephen Polzin , Kudo Tsunoda , Darren Bennett , Stephen Latta , Mark Finocchio , Gregory G. Snook , Relja Markovic
CPC分类号： G06F3/017 , G06K9/00201 , G06K9/00355
摘要： Systems and methods for mapping natural input devices to legacy system inputs are disclosed. One example system may include a computing device having an algorithmic preprocessing module configured to receive input data containing a natural user input and to identify the natural user input in the input data. The computing device may further include a gesture module coupled to the algorithmic preprocessing module, the gesture module being configured to associate the natural user input to a gesture in a gesture library. The computing device may also include a mapping module to map the gesture to a legacy controller input, and to send the legacy controller input to a legacy system in response to the natural user input.
摘要翻译： 公开了将自然输入设备映射到传统系统输入的系统和方法。 一个示例性系统可以包括具有算法预处理模块的计算设备，其被配置为接收包含自然用户输入的输入数据并识别输入数据中的自然用户输入。 计算设备还可以包括耦合到算法预处理模块的手势模块，所述手势模块被配置为将自然用户输入与手势库中的手势相关联。 计算设备还可以包括映射模块以将手势映射到传统控制器输入，并且响应于自然用户输入将遗留控制器输入发送到传统系统。
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公开(公告)号：US08135935B2
公开(公告)日：2012-03-13
申请号：US11725922
申请日：2007-03-20
CPC分类号： G06F11/1044
摘要： A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and second physical addresses of the memory correspond to memory locations that store data and a corresponding ECC, respectively. The method further comprises translating the logical address into the first and second physical addresses, accessing the data over a data path, separately accessing the ECC over the same data path, and checking the integrity of the data using the ECC.
摘要翻译： 用于在非ECC兼容组件中实现纠错码（ECC）检查的方法和装置。 该方法包括接收逻辑地址，其中逻辑地址映射到存储器的第一和第二物理地址。 存储器的第一和第二物理地址分别对应于存储数据的存储器位置和对应的ECC。 该方法还包括将逻辑地址转换为第一和第二物理地址，通过数据路径访问数据，通过相同数据路径分别访问ECC，以及使用ECC检查数据的完整性。
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公开(公告)号：US20100199229A1
公开(公告)日：2010-08-05
申请号：US12411276
申请日：2009-03-25
申请人： Alex Kipman , Stephen Polzin , Kudo Tsunoda , Darren Bennett , Stephen Latta , Mark Finocchio , Gregory G. Snook , Relja Markovic
发明人： Alex Kipman , Stephen Polzin , Kudo Tsunoda , Darren Bennett , Stephen Latta , Mark Finocchio , Gregory G. Snook , Relja Markovic
CPC分类号： G06F3/017 , G06K9/00201 , G06K9/00355
摘要： Systems and methods for mapping natural input devices to legacy system inputs are disclosed. One example system may include a computing device having an algorithmic preprocessing module configured to receive input data containing a natural user input and to identify the natural user input in the input data. The computing device may further include a gesture module coupled to the algorithmic preprocessing module, the gesture module being configured to associate the natural user input to a gesture in a gesture library. The computing device may also include a mapping module to map the gesture to a legacy controller input, and to send the legacy controller input to a legacy system in response to the natural user input.
摘要翻译： 公开了将自然输入设备映射到传统系统输入的系统和方法。 一个示例性系统可以包括具有算法预处理模块的计算设备，其被配置为接收包含自然用户输入的输入数据并识别输入数据中的自然用户输入。 计算设备还可以包括耦合到算法预处理模块的手势模块，所述手势模块被配置为将自然用户输入与手势库中的手势相关联。 计算设备还可以包括映射模块以将手势映射到传统控制器输入，并且响应于自然用户输入将遗留控制器输入发送到传统系统。
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10.发明授权
公开(公告)号：US5416907A
公开(公告)日：1995-05-16
申请号：US538656
申请日：1990-06-15
CPC分类号： G06F15/17 , G06F13/28 , G06F13/4018
摘要： A method and apparatus for optimizing the performance of a multibus data processing system is provided. An I/O controller is coupled to the I/O bus and includes MORE bit setting means for initiating a MORE stream transaction on the I/O bus and for thereafter terminating the MORE stream transaction. An adapter coupling the I/O bus to the system bus, is configured to receive the MORE stream transaction and transfer it to main memory. The adapter includes MORE bit decoding means for identifying the beginning and the end of the MORE stream transaction, and for identifying whether the MORE stream transaction is a READ or WRITE transaction. The adapter also includes a first buffer for receiving data from the I/O bus and transferring the data to the memory in accordance with the memory's full block transfer size, and a second buffer for receiving a full block of data and transferring that data in accordance with the I/O bus transaction limitations. The adapter is capable of invalidating data located in the first buffer and clearing data located in the second buffer in accordance with a discard transaction when the I/O controller fails to properly terminate the MORE stream transaction.
摘要翻译： 提供了一种用于优化多机架数据处理系统的性能的方法和装置。 I / O控制器耦合到I / O总线，并且包括更多位设置装置，用于在I / O总线上启动MORE流事务，并且此后终止MORE流事务。 将I / O总线耦合到系统总线的适配器被配置为接收MORE流事务并将其传送到主存储器。 适配器包括更多位解码装置，用于识别更多流事务的开始和结束，以及用于识别更多流事务是READ还是WRITE事务。 适配器还包括用于从I / O总线接收数据并根据存储器的完整块传输大小将数据传送到存储器的第一缓冲器，以及用于接收完整数据块并根据数据传送该数据的第二缓冲器 与I / O总线交易限制。 当I / O控制器无法正确终止MORE流事务时，适配器能够根据丢弃事务使位于第一缓冲区中的数据无效并清除位于第二缓冲区中的数据。
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