METHOD AND APPARATUS FOR PULSE WIDTH MODULATION SIGNAL PROCESSING
    1.
    发明申请
    METHOD AND APPARATUS FOR PULSE WIDTH MODULATION SIGNAL PROCESSING 有权
    脉冲宽度调制信号处理的方法和装置

    公开(公告)号:US20110115657A1

    公开(公告)日:2011-05-19

    申请号:US13003822

    申请日:2008-07-30

    CPC classification number: H04B10/802

    Abstract: A signal processor (30) is provided. The signal processor (30) is configured to receive a first analog signal and convert the first analog signal into a digital signal. The digital signal is transmitted across an electrical barrier and converted into a scaled pulse width modulation signal. The scaled pulse width modulation signal is then converted into a scaled second analog signal, which is output by the signal processor (30).

    Abstract translation: 提供信号处理器(30)。 信号处理器(30)被配置为接收第一模拟信号并将第一模拟信号转换成数字信号。 数字信号通过电屏障传输并转换为缩放的脉宽调制信号。 缩放的脉冲宽度调制信号然后被转换成由信号处理器(30)输出的缩放的第二模拟信号。

    Bus loop power interface and method
    2.
    发明授权
    Bus loop power interface and method 有权
    总线回路电源接口及方法

    公开(公告)号:US08063694B2

    公开(公告)日:2011-11-22

    申请号:US12297237

    申请日:2006-04-28

    Applicant: Stig Lindemann

    Inventor: Stig Lindemann

    CPC classification number: H04L25/02 H04L25/0278 H04L25/0292

    Abstract: A bus loop power interface (100) is provided according to the invention. The bus loop power interface (100) comprises a voltage control module (110) receiving a loop voltage VLOOP and generating a predetermined supply voltage VSUPPLY, an impedance control module (120) coupled to the voltage control module (110), with the impedance control module (120) receiving a loop current ILOOP and generating a predetermined supply current ISUPPLY, and a feedback (115) coupled between the voltage control module (110) and the impedance control module (120). The feedback (115) provides a feedback signal to the voltage control module (110) that enables the voltage control module (110) to substantially maintain the predetermined supply voltage VSUPPLY.

    Abstract translation: 根据本发明提供总线回路电源接口(100)。 总线回路电源接口(100)包括接收环路电压VLOOP并产生预定电源电压VSUPPLY的电压控制模块(110),耦合到电压控制模块(110)的阻抗控制模块(120),阻抗控制 模块(120)接收环路电流I LOOP并产生预定的电源电流ISUPPLY,以及耦合在电压控制模块(110)和阻抗控制模块(120)之间的反馈(115)。 反馈(115)向电压控制模块(110)提供反馈信号,使得电压控制模块(110)能够基本维持预定的电源电压VSUPPLY。

    Step-down voltage converter
    3.
    发明授权
    Step-down voltage converter 有权
    降压电压转换器

    公开(公告)号:US07940533B2

    公开(公告)日:2011-05-10

    申请号:US11994387

    申请日:2005-07-26

    CPC classification number: H02M3/155

    Abstract: A step-down voltage converter (100) for generating an output voltage (VOUT) from an input voltage (VIN) is provided. The converter (100) includes a switch (111) having a first terminal (112) and a second terminal (114), wherein the second terminal (114) is electrically coupled with the output voltage (VOUT). Also included is a rectifier (117) having a first terminal (118) and a second terminal (120), wherein the second terminal (120) is electrically coupled with the output voltage (VOUT). A first inductor (124) electrically couples the first terminal (112) of the switch (111) with the input voltage (VIN). A second inductor (126) magnetically coupled with the first inductor (124) electrically couples the first terminal (118) of the rectifier (117) with a voltage reference (128). A switch controller (110) coupled with the output voltage (VOUT) is configured to control the switch (111).

    Abstract translation: 提供了用于从输入电压(VIN)产生输出电压(VOUT)的降压电压转换器(100)。 转换器(100)包括具有第一端子(112)和第二端子(114)的开关(111),其中第二端子(114)与输出电压(VOUT)电耦合。 还包括具有第一端子(118)和第二端子(120)的整流器(117),其中第二端子(120)与输出电压(VOUT)电耦合。 第一电感器(124)将开关(111)的第一端子(112)与输入电压(VIN)电耦合。 与第一电感器(124)磁耦合的第二电感器(126)将整流器(117)的第一端子(118)与参考电压(128)电耦合。 与输出电压(VOUT)耦合的开关控制器(110)被配置为控制开关(111)。

    Method and adapter for protocol detection in a field bus network
    4.
    发明申请
    Method and adapter for protocol detection in a field bus network 审中-公开
    现场总线网络中协议检测的方法和适配器

    公开(公告)号:US20050232305A1

    公开(公告)日:2005-10-20

    申请号:US10519384

    申请日:2003-01-20

    Applicant: Stig Lindemann

    Inventor: Stig Lindemann

    CPC classification number: H04L69/18 G05B2219/25217

    Abstract: The present invention relates to a field bus adapter for transmitting and receiving control data from a field bus network where data is being exchanged according to a specific field bus protocol, said adapter comprises a transmitter for transmitting data to the field bus network and a receiver for receiving data from the field bus network, characterised in that the adapter further comprises a protocol detector adapted for detecting a field bus protocol between a number of predefined field bus protocols and for setting up the receiver and the transmitter for communicating according to said detected field bus protocol. The protocol detector comprises means for receiving data from the field bus, means for determining if the received data complies with predefined characteristics stored in a database, said characteristics uniquely identifying data of only one of said number of predefined field bus protocols, means for setting up the receiver and the transmitter for communicating according to said one protocol, if said received data complies with said characteristics. The invention further relates to a method for transmitting and receiving control data from a field bus network according to the above.

    Abstract translation: 本发明涉及一种用于根据特定的现场总线协议从现场总线网络发送和接收控制数据的现场总线适配器,所述适配器包括用于向现场总线网络发送数据的发射机和用于 从所述现场总线网络接收数据,其特征在于,所述适配器还包括协议检测器,所述协议检测器适用于在多个预定义的现场总线协议之间检测现场总线协议,并且根据所述检测到的现场总线设置所述接收机和所述发射机进行通信 协议。 协议检测器包括用于从现场总线接收数据的装置,用于确定所接收的数据是否符合存储在数据库中的预定特性的装置,所述特征唯一地识别所述数量的预定义现场总线协议中的一个的数据, 所述接收机和所述发射机用于根据所述一个协议进行通信,如果所述接收的数据符合所述特征。 本发明还涉及一种根据上述从现场总线网络发送和接收控制数据的方法。

    DELTA-SIGMA MODULATOR AND DITHERING METHOD INCLUDING A DITHERING CAPABILITY FOR ELIMINATING IDLE TONES
    5.
    发明申请
    DELTA-SIGMA MODULATOR AND DITHERING METHOD INCLUDING A DITHERING CAPABILITY FOR ELIMINATING IDLE TONES 有权
    DELTA-SIGMA调制器及其解决方案,其中包括消除空闲费用的能力

    公开(公告)号:US20110128173A1

    公开(公告)日:2011-06-02

    申请号:US13054826

    申请日:2008-07-30

    CPC classification number: H03M3/334 H03M3/362 H03M3/458

    Abstract: A delta-sigma modulator (100) including a dithering capability for eliminating idle tones is provided according to the invention. The delta-sigma modulator (100) includes a bitstream converter (107) configured to generate a digital signal output substantially corresponding to an analog signal input, a periodicity detector (111) coupled to the bitstream converter (107) and configured to detect periodicity in the digital signal output, and a dithering sequence generator (116) connected to and activated by the periodicity detector (111). The dithering sequence generator (116) generates a dithering sequence. The delta-sigma modulator (100) further includes a pulse-width modulation (PWM) generator (119) coupled to the dithering sequence generator (116) and receiving the dithering sequence. The PWM generator (119) modulates the dithering sequence onto the analog signal input of the delta-sigma modulator (100) as a dithering signal.

    Abstract translation: 根据本发明提供了包括用于消除空闲音调的抖动能力的Δ-Σ调制器(100)。 Δ-Σ调制器(100)包括比特流转换器(107),其被配置为生成基本上对应于模拟信号输入的数字信号输出,耦合到位流转换器(107)的周期性检测器(111) 数字信号输出端,以及与周期性检测器(111)连接并由周期检测器(111)激活的抖动序列发生器(116)。 抖动序列发生器(116)产生抖动序列。 Δ-Σ调制器(100)还包括耦合到抖动序列发生器(116)并接收抖动序列的脉冲宽度调制(PWM)发生器(119)。 PWM发生器(119)将抖动序列调制到Δ-Σ调制器(100)的模拟信号输入上作为抖动信号。

    BUS LOOP POWER INTERFACE AND METHOD
    6.
    发明申请
    BUS LOOP POWER INTERFACE AND METHOD 有权
    总线电源接口和方法

    公开(公告)号:US20090278519A1

    公开(公告)日:2009-11-12

    申请号:US12297237

    申请日:2006-04-28

    Applicant: Stig Lindemann

    Inventor: Stig Lindemann

    CPC classification number: H04L25/02 H04L25/0278 H04L25/0292

    Abstract: A bus loop power interface (100) is provided according to the invention. The bus loop power interface (100) comprises a voltage control module (110) receiving a loop voltage VLOOP and generating a predetermined supply voltage VSUPPLY, an impedance control module (120) coupled to the voltage control module (110), with the impedance control module (120) receiving a loop current ILOOP and generating a predetermined supply current ISUPPLY, and a feedback (115) coupled between the voltage control module (110) and the impedance control module (120). The feedback (115) provides a feedback signal to the voltage control module (110) that enables the voltage control module (110) to substantially maintain the predetermined supply voltage VSUPPLY.

    Abstract translation: 根据本发明提供总线回路电源接口(100)。 总线回路电源接口(100)包括接收环路电压VLOOP并产生预定电源电压VSUPPLY的电压控制模块(110),耦合到电压控制模块(110)的阻抗控制模块(120),阻抗控制 模块(120)接收环路电流I LOOP并产生预定的电源电流ISUPPLY,以及耦合在电压控制模块(110)和阻抗控制模块(120)之间的反馈(115)。 反馈(115)向电压控制模块(110)提供反馈信号,使得电压控制模块(110)能够基本维持预定的电源电压VSUPPLY。

    Delta-sigma modulator and dithering method including a dithering capability for eliminating idle tones
    7.
    发明授权
    Delta-sigma modulator and dithering method including a dithering capability for eliminating idle tones 有权
    Δ-Σ调制器和抖动方法包括用于消除空闲音调的抖动能力

    公开(公告)号:US08339297B2

    公开(公告)日:2012-12-25

    申请号:US13054826

    申请日:2008-07-30

    CPC classification number: H03M3/334 H03M3/362 H03M3/458

    Abstract: A delta-sigma modulator (100) including a dithering capability for eliminating idle tones is provided according to the invention. The delta-sigma modulator (100) includes a bitstream converter (107) configured to generate a digital signal output substantially corresponding to an analog signal input, a periodicity detector (111) coupled to the bitstream converter (107) and configured to detect periodicity in the digital signal output, and a dithering sequence generator (116) connected to and activated by the periodicity detector (111). The dithering sequence generator (116) generates a dithering sequence. The delta-sigma modulator (100) further includes a pulse-width modulation (PWM) generator (119) coupled to the dithering sequence generator (116) and receiving the dithering sequence. The PWM generator (119) modulates the dithering sequence onto the analog signal input of the delta-sigma modulator (100) as a dithering signal.

    Abstract translation: 根据本发明提供了包括用于消除空闲音调的抖动能力的Δ-Σ调制器(100)。 Δ-Σ调制器(100)包括比特流转换器(107),其被配置为生成基本上对应于模拟信号输入的数字信号输出,耦合到位流转换器(107)的周期性检测器(111) 数字信号输出端,以及与周期性检测器(111)连接并由周期检测器(111)激活的抖动序列发生器(116)。 抖动序列发生器(116)产生抖动序列。 Δ-Σ调制器(100)还包括耦合到抖动序列发生器(116)并接收抖动序列的脉冲宽度调制(PWM)发生器(119)。 PWM发生器(119)将抖动序列调制到Δ-Σ调制器(100)的模拟信号输入上作为抖动信号。

    DATA TRANSLATION SYSTEM AND METHOD
    8.
    发明申请
    DATA TRANSLATION SYSTEM AND METHOD 审中-公开
    数据翻译系统和方法

    公开(公告)号:US20110116580A1

    公开(公告)日:2011-05-19

    申请号:US13054152

    申请日:2008-07-30

    CPC classification number: H03M7/50 H03M1/0827 H03M1/1235 H04B10/802

    Abstract: A data translation system (100) for performing a non-linear data translation on a digitized AC signal is provided. The non-linear data translation system (100) includes an input for receiving the digitized AC signal, an output for outputting a non-linearly translated signal, and a processing system (104) coupled to the input and to the output. The processing system (104) is configured to receive the digitized AC signal, non-linearly translate the digitized AC signal using a predetermined transfer function to create the non-linearly translated signal, and transfer the non-linearly translated signal to the output.

    Abstract translation: 提供一种用于对数字化的AC信号执行非线性数据转换的数据转换系统(100)。 非线性数据转换系统(100)包括用于接收数字化AC信号的输入端,用于输出非线性转换信号的输出端以及耦合到输入端和输出端的处理系​​统(104)。 处理系统(104)被配置为接收数字化的AC信号,使用预定的传递函数非线性地转换数字化的AC信号,以产生非线性转换的信号,并将非线性转换的信号传送到输出端。

    STEP-DOWN VOLTAGE CONVERTER
    9.
    发明申请
    STEP-DOWN VOLTAGE CONVERTER 有权
    降压电压转换器

    公开(公告)号:US20100128499A1

    公开(公告)日:2010-05-27

    申请号:US11994387

    申请日:2005-07-26

    CPC classification number: H02M3/155

    Abstract: A step-down voltage converter (100) for generating an output voltage (VOUT) from an input voltage (VIN) is provided. The converter (100) includes a switch (111) having a first terminal (112) and a second terminal (114), wherein the second terminal (114) is electrically coupled with the output voltage (VOUT). Also included is a rectifier (117) having a first terminal (118) and a second terminal (120), wherein the second terminal (120) is electrically coupled with the output voltage (VOUT). A first inductor (124) electrically couples the first terminal (112) of the switch (111) with the input voltage (VIN). A second inductor (126) magnetically coupled with the first inductor (124) electrically couples the first terminal (118) of the rectifier (117) with a voltage reference (128). A switch controller (110) coupled with the output voltage (VOUT) is configured to control the switch (111).

    Abstract translation: 提供了用于从输入电压(VIN)产生输出电压(VOUT)的降压电压转换器(100)。 转换器(100)包括具有第一端子(112)和第二端子(114)的开关(111),其中第二端子(114)与输出电压(VOUT)电耦合。 还包括具有第一端子(118)和第二端子(120)的整流器(117),其中第二端子(120)与输出电压(VOUT)电耦合。 第一电感器(124)将开关(111)的第一端子(112)与输入电压(VIN)电耦合。 与第一电感器(124)磁耦合的第二电感器(126)将整流器(117)的第一端子(118)与参考电压(128)电耦合。 与输出电压(VOUT)耦合的开关控制器(110)被配置为控制开关(111)。

    Apparatus for analogue information transfer
    10.
    发明授权
    Apparatus for analogue information transfer 有权
    模拟信息传输装置

    公开(公告)号:US06617988B1

    公开(公告)日:2003-09-09

    申请号:US09979158

    申请日:2002-03-22

    Applicant: Stig Lindemann

    Inventor: Stig Lindemann

    CPC classification number: H03L7/06 H03K7/10 H04L7/027 H04L7/033 H04L25/493

    Abstract: A method and apparatus for generating second pulse signal from a first pulse signal. The second pulse signal has flanks positioned with a well-defined spacing. The width of the pulses as well as the frequency and phase correspond to the first signal. The apparatus employs a shape generator for generating a shape signal having uniform and well-defined flanks. A frequency generator produces a clock signal wherein the clock and phase correspond to the first pulse signal. The signal generator produces a second pulse signal from the clock signal and the shape signal for use in restoring distorted digital signals to ensure accuracy and signal integrity.

    Abstract translation: 一种从第一脉冲信号产生第二脉冲信号的方法和装置。 第二脉冲信号具有以明确限定的间隔定位的侧面。 脉冲的宽度以及频率和相位对应于第一信号。 该装置采用形状发生器来产生具有均匀和明确限定的侧面的形状信号。 频率发生器产生时钟信号,其中时钟和相位对应于第一脉冲信号。 信号发生器从时钟信号和形状信号产生第二脉冲信号,用于恢复失真的数字信号,以确保精度和信号完整性。

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