Layer Transfer Technology for Silicon Carbide
    2.
    发明申请
    Layer Transfer Technology for Silicon Carbide 审中-公开
    碳化硅层转移技术

    公开(公告)号:US20160284589A1

    公开(公告)日:2016-09-29

    申请号:US15172063

    申请日:2016-06-02

    Abstract: Devices that include a layer of silicon carbide and methods for making such devices are disclosed. A method includes obtaining a first silicon carbide wafer implanted with protons; applying a first layer of spin-on-glass over the first silicon carbide wafer; obtaining a first semiconductor substrate; bonding (i) the first layer of spin-on-glass to (ii) the first semiconductor substrate; and heating the first silicon carbide wafer to initiate splitting of the first silicon carbide wafer so that a first layer of silicon carbide remains over the first semiconductor substrate. A semiconductor device includes a semiconductor substrate; a first layer of spin-on-glass positioned over the semiconductor substrate; a first layer of silicon carbide positioned over the first layer of spin-on-glass; a second layer of spin-on-glass positioned over the first layer of silicon carbide; and a second layer of silicon carbide positioned over the second layer of spin-on-glass.

    Abstract translation: 公开了包括碳化硅层的装置和用于制造这种装置的方法。 一种方法包括获得植入质子的第一碳化硅晶片; 在第一碳化硅晶片上施加第一层旋涂玻璃; 获得第一半导体衬底; 将(i)第一层旋涂玻璃接合到(ii)第一半导体衬底; 以及加热所述第一碳化硅晶片以引发所述第一碳化硅晶片的分裂,使得第一碳化硅层保留在所述第一半导体衬底之上。 半导体器件包括半导体衬底; 位于半导体衬底上的第一层旋涂玻璃; 位于第一层旋涂玻璃上的第一层碳化硅; 位于第一层碳化硅上的第二层旋涂玻璃; 以及位于第二层旋涂玻璃上的第二层碳化硅。

    PEER-TO-PEER COMMUNICATION BASED ON DEVICE IDENTIFIERS

    公开(公告)号:US20170195327A1

    公开(公告)日:2017-07-06

    申请号:US15468027

    申请日:2017-03-23

    CPC classification number: H04L63/0876 G06F21/44 H04L63/104 H04W12/06 H04W12/08

    Abstract: A server system receives from a first electronic device a first device identifier and network information of the first electronic device; subsequent to receiving the first device identifier and the network information of the first electronic device, receives from a second electronic device a second device identifier and network information of the second electronic device; in response to receiving from the second electronic device the second device identifier and the network information of the second electronic device, determines whether the first device identifier is associated with the second device identifier; and, in accordance with a determination that the first device identifier is associated with the second device identifier, sends to the second electronic device the network information of the first electronic device and/or sends to the first electronic device the network information of the second electronic device.

    Methods for removing nuclei formed during epitaxial growth
    4.
    发明授权
    Methods for removing nuclei formed during epitaxial growth 有权
    去除在外延生长期间形成的核的方法

    公开(公告)号:US09378950B1

    公开(公告)日:2016-06-28

    申请号:US15051362

    申请日:2016-02-23

    Abstract: A method for removing nuclei formed during a selective epitaxial growth process includes epitaxially growing a first group of one or more semiconductor structures over a substrate with one or more mask layers. A second group of a plurality of semiconductor structures is formed on the one or more mask layers. The method also includes forming one or more protective layers over the first group of one or more semiconductor structures. At least a subset of the second group of the plurality of semiconductor structures is exposed from the one or more protective layers. The method further includes, subsequent to forming the one or more protective layers over the first group of one or more semiconductor structures, etching at least the subset of the second group of the plurality of semiconductor structures.

    Abstract translation: 一种用于去除在选择性外延生长工艺过程中形成的核的方法包括用一个或多个掩模层在衬底上外延生长第一组一个或多个半导体结构。 在一个或多个掩模层上形成第二组多个半导体结构。 该方法还包括在一个或多个半导体结构的第一组上形成一个或多个保护层。 多个半导体结构的第二组的至少一个子集从一个或多个保护层露出。 该方法还包括:在一个或多个半导体结构的第一组上形成一个或多个保护层之后,至少蚀刻多个半导体结构的第二组的子集。

    Gate-controlled Charge Modulated Device for CMOS Image Sensors

    公开(公告)号:US20190221595A1

    公开(公告)日:2019-07-18

    申请号:US16167241

    申请日:2018-10-22

    Applicant: Stratio Inc.

    Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

    Methods for forming a germanium island using selective epitaxial growth and a sacrificial filling layer

    公开(公告)号:US10366884B1

    公开(公告)日:2019-07-30

    申请号:US16184984

    申请日:2018-11-08

    Applicant: Stratio

    Abstract: A method for obtaining a semiconductor island includes epitaxially growing a semiconductor structure over a substrate with a mask layer defining a region not covered by the mask layer. The semiconductor structure includes a first portion located adjacent to the mask layer and a second portion located away from the mask layer. The first portion has a first height that is less than a second height of a portion of the mask layer located adjacent to the first portion. The second portion has a third height that is equal to, or greater than, the second height. The method also includes forming a filling layer over at least the first portion; and, subsequently removing at least a portion of the semiconductor structure that is located above the second height. Devices made by this method are also disclosed.

    Gate-Controlled Charge Modulated Device for CMOS Image Sensors

    公开(公告)号:US20230019977A1

    公开(公告)日:2023-01-19

    申请号:US17684124

    申请日:2022-03-01

    Applicant: Stratio, Inc.

    Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

    Gate-controlled charge modulated device for CMOS image sensors

    公开(公告)号:US11264418B2

    公开(公告)日:2022-03-01

    申请号:US16167241

    申请日:2018-10-22

    Applicant: Stratio Inc.

    Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

    METHODS FOR FORMING A GERMANIUM ISLAND USING SELECTIVE EPITAXIAL GROWTH AND A SACRIFICIAL FILLING LAYER

    公开(公告)号:US20210343528A1

    公开(公告)日:2021-11-04

    申请号:US17289205

    申请日:2018-11-09

    Applicant: STRATIO

    Abstract: A method for obtaining a semiconductor island includes epitaxially growing a semiconductor structure over a substrate with a mask layer defining a region not covered by the mask layer. The semiconductor structure includes a first portion located adjacent to the mask layer and a second portion located away from the mask layer. The first portion has a first height that is less than a second height of a portion of the mask layer located adjacent to the first portion. The second portion has a third height that is equal to, or greater than the second height. The method also includes forming a filling layer over at least the first portion; and, subsequently removing at least a portion of the semiconductor structure that is located above the second height. Devices made by this method are also disclosed.

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