公开(公告)号：US20240332019A1

公开(公告)日：2024-10-03

申请号：US18609763

申请日：2024-03-19

申请人： SOCIETE DE COMMERCIALISATION DES PRODUITS DE LA RECHERCHE APPLIQUÉE SOCPRA SCIENCES ET GÉNIE S.E.C.

发明人： Alexandre HEINTZ ,  Bouraoui ILAHI ,  Abderraouf BOUCHERIF ,  Richard ARÈS

IPC分类号： H01L21/02 ,  H01L29/06 ,  H01L29/267

CPC分类号： H01L21/02694 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0259 ,  H01L29/0684 ,  H01L29/267

摘要： There is described a method of manufacturing a semiconductor heterostructure. The method generally has: depositing an epitaxial layer of a first material atop a crystalline substrate, the crystalline substrate having a porous layer of a second material, the porous layer having a pore density above a pore density threshold, the second material different from the first material, heating the semiconductor heterostructure above a temperature threshold, said depositing and said heating diffusing atoms of the first material across the crystalline substrate and into the porous layer, the atoms of the first material at least partially filling voids of the porous layer thereby relieving strain existing between the first material of the epitaxial layer and the second material of the porous layer.

公开(公告)号：US20240332013A1

公开(公告)日：2024-10-03

申请号：US18193041

申请日：2023-03-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. ,  National Yang Ming Chiao Tung University

发明人： Chun-Liang LIN ,  Chenming HU ,  Wan-Hsin CHEN ,  Naoya KAWAKAMI

IPC分类号： H01L21/02

CPC分类号： H01L21/02568 ,  H01L21/02376 ,  H01L21/0262 ,  H01L21/02694

摘要： The present disclosure in various embodiments provides a method. In some embodiments of the present disclosure, the method includes forming a transition metal dichalcogenide layer on a substrate; and performing an ion bombardment process on the transition metal dichalcogenide layer, performing an annealing process on the transition metal dichalcogenide layer.

公开(公告)号：US11955553B2

公开(公告)日：2024-04-09

申请号：US18174045

申请日：2023-02-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Su-Hao Liu ,  Kuo-Ju Chen ,  Wen-Yen Chen ,  Ying-Lang Wang ,  Liang-Yin Chen ,  Li-Ting Wang ,  Huicheng Chang

IPC分类号： H01L21/24 ,  H01L21/02 ,  H01L21/324 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/785 ,  H01L21/02694 ,  H01L21/324 ,  H01L21/76829 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/6681

摘要： Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.

公开(公告)号：US11822163B2

公开(公告)日：2023-11-21

申请号：US16446235

申请日：2019-06-19

申请人： equal1.labs Inc.

发明人： Dirk Robert Walter Leipold ,  George Adrian Maxim ,  Michael Albert Asker

IPC分类号： G06N10/00 ,  G06N10/40 ,  G06N10/70 ,  G02F1/017 ,  B82Y10/00 ,  H01L29/12 ,  H01L29/66 ,  H03K19/195 ,  B82Y15/00 ,  G06F1/20 ,  G06F11/07 ,  G06F15/16 ,  G06N99/00 ,  G11C19/32 ,  H01L21/02 ,  H01L27/088 ,  H01L29/15 ,  H01L29/417 ,  H01L33/04 ,  H03M1/34 ,  H03M1/66 ,  H03K3/38 ,  H03M13/15 ,  H10N60/10 ,  H10N69/00

CPC分类号： G02F1/01725 ,  B82Y10/00 ,  B82Y15/00 ,  G06F1/20 ,  G06F11/0724 ,  G06F11/0751 ,  G06F11/0793 ,  G06F15/16 ,  G06N10/00 ,  G06N10/70 ,  G06N99/00 ,  G11C19/32 ,  H01L21/02694 ,  H01L27/0883 ,  H01L29/122 ,  H01L29/157 ,  H01L29/41791 ,  H01L29/66977 ,  H01L29/66984 ,  H01L33/04 ,  H03K3/38 ,  H03K19/195 ,  H03M1/34 ,  H03M1/66 ,  H03M13/1575 ,  H10N60/11 ,  H10N60/128 ,  H10N69/00 ,  G02F1/01791

摘要： A novel and useful quantum computing machine includes classic computing and quantum computing cores. A programmable pattern generator executes instructions that control the quantum core. A pulse generator generates the control signals input to the quantum core to perform quantum operations. A partial readout of the quantum state is re-injected into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the readout before being re-injected into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or retrieved from classic memory where sequences of commands are stored in memory. A cryostat unit functions to cool the quantum computing core to approximately 4 Kelvin.

公开(公告)号：US11680339B2

公开(公告)日：2023-06-20

申请号：US16497837

申请日：2018-03-19

申请人： FURUKAWA CO., LTD.

发明人： Yujiro Ishihara ,  Hiroki Goto ,  Shoichi Fuda ,  Tomohiro Kobayashi ,  Hitoshi Sasaki

IPC分类号： C30B29/40 ,  C23C16/34 ,  C30B25/18 ,  H01L21/02 ,  H01L21/78 ,  C01B21/06

CPC分类号： C30B29/406 ,  C23C16/34 ,  C30B25/183 ,  C30B25/186 ,  H01L21/0242 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02458 ,  H01L21/02694 ,  H01L21/7813 ,  C01B21/06 ,  Y10T428/219

摘要： There is provided a method of manufacturing a group III nitride semiconductor substrate including: a fixing step S10 of fixing abase substrate, which includes a group III nitride semiconductor layer having a semipolar plane as a main surface, to a susceptor; a first growth step S11 of forming a first growth layer by growing a group III nitride semiconductor over the main surface of the group III nitride semiconductor layer in a state in which the base substrate is fixed to the susceptor using an HVPE method; a cooling step S12 of cooling a laminate including the susceptor, the base substrate, and the first growth layer; and a second growth step S13 of forming a second growth layer by growing a group III nitride semiconductor over the first growth layer in a state in which the base substrate is fixed to the susceptor using the HVPE method.

公开(公告)号：US11652000B2

公开(公告)日：2023-05-16

申请号：US17197232

申请日：2021-03-10

申请人： Kioxia Corporation

发明人： Hidekazu Hayashi ,  Mie Matsuo

IPC分类号： H01L21/00 ,  H01L21/78 ,  H01L21/18 ,  H01L21/02 ,  H01L27/11526 ,  H01L27/11556

CPC分类号： H01L21/7813 ,  H01L21/02694 ,  H01L21/187 ,  H01L27/11526 ,  H01L27/11556

摘要： In one embodiment, a method of manufacturing a semiconductor device includes forming a first semiconductor layer including impurity atoms with a first density, on a first substrate, forming a second semiconductor layer including impurity atoms with a second density higher than the first density, on the first semiconductor layer, and forming a porous layer resulting from porosification of at least a portion of the second semiconductor layer. The method further includes forming a first film including a device, on the porous layer, providing a second substrate provided with a second film including a device, and bonding the first and second substrates to sandwich the first and second films. The method further includes separating the first and second substrates from each other such that a first portion of the porous layer remains on the first substrate and a second portion of the porous layer remains on the second substrate.

公开(公告)号：US20190019886A1

公开(公告)日：2019-01-17

申请号：US16135298

申请日：2018-09-19

申请人： Renesas Electronics Corporation

发明人： Tatsuo NAKAYAMA ,  Hironobu MIYAMOTO

IPC分类号： H01L29/778 ,  H01L21/265 ,  H01L21/266 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L21/02 ,  H01L29/20 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40

CPC分类号： H01L29/7787 ,  H01L21/02694 ,  H01L21/2258 ,  H01L21/2654 ,  H01L21/26546 ,  H01L21/266 ,  H01L29/0688 ,  H01L29/1066 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42364 ,  H01L29/42368 ,  H01L29/66462 ,  H01L29/7783

摘要： A semiconductor device includes a codoped layer, a channel layer, a barrier layer, and a gate electrode disposed in a trench extending through the barrier layer and reaching a middle point in the channel layer via a gate insulating film. On both sides of the gate electrode, a source electrode and a drain electrode are formed. On the source electrode side, an n-type semiconductor region is disposed to fix a potential and achieve a charge removing effect while, on the drain electrode side, a p-type semiconductor region is disposed to improve a drain breakdown voltage. By introducing hydrogen into a region of the codoped layer containing Mg as a p-type impurity in an amount larger than that of Si as an n-type impurity where the n-type semiconductor region is to be formed, it is possible to inactivate Mg and provide the n-type semiconductor region.

公开(公告)号：US20180277708A1

公开(公告)日：2018-09-27

申请号：US15923307

申请日：2018-03-16

申请人： Alliance for Sustainable Energy, LLC

发明人： David Scott Albin ,  Wyatt Keith Metzger ,  James Michael Burst ,  Eric Michael Colegrove ,  Joel Nathan Duenow

IPC分类号： H01L31/18 ,  H01L21/02

CPC分类号： H01L31/1828 ,  H01L21/0248 ,  H01L21/02491 ,  H01L21/02562 ,  H01L21/02631 ,  H01L21/02634 ,  H01L21/02694 ,  H01L31/1836 ,  H01L31/1864 ,  H01L31/1868

摘要： Methods for growing and using large-grain templates are provided. According to an aspect of the invention, a method includes depositing a small-grain layer of a semiconductor material; treating the small-grain layer such that the small-grain layer becomes a large-grain layer; and growing an epitaxial layer of the semiconductor material on the large-grain layer. A ratio of an average grain size of the small-grain layer to a thickness of the small-grain layer is less than 1.0, and a ratio of an average grain size of the large-grain layer to a thickness of the large-grain layer is greater than 1.5.

公开(公告)号：US09991390B2

公开(公告)日：2018-06-05

申请号：US14871277

申请日：2015-09-30

申请人： The Regents of the University of California

发明人： Aaron S. George ,  Robert Ionescu ,  Hamed Hosseini Bay ,  Mihrimah Ozkan ,  Cengiz S Ozkan

IPC分类号： H01L21/02 ,  H01L29/78 ,  H01L29/786 ,  H01L29/10 ,  H01L29/66 ,  C30B29/46 ,  B82Y30/00 ,  C23C16/30

CPC分类号： H01L29/78681 ,  B82Y30/00 ,  C23C16/305 ,  C30B29/46 ,  H01L21/02381 ,  H01L21/02485 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02516 ,  H01L21/02568 ,  H01L21/02628 ,  H01L21/02664 ,  H01L21/02694 ,  H01L29/66742 ,  H01L29/66969

摘要： A coated substrate including a thin film of a transition metal dichalcogenide and associated methods are shown. In one example, the substrate is a semiconductor wafer. In one example, the thin film is atomically thin, and the substrate is a number of centimeters in diameter. In one example a crystalline structure of the thin film is substantially 2H hexagonal.

公开(公告)号：US09953859B2

公开(公告)日：2018-04-24

申请号：US15241431

申请日：2016-08-19

申请人： SUMCO CORPORATION

发明人： Yoshihiro Koga

IPC分类号： H01L21/762 ,  H01L21/84 ,  H01L21/02 ,  H01L21/311

CPC分类号： H01L21/76251 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02694 ,  H01L21/31116 ,  H01L21/76254 ,  H01L21/76256 ,  H01L21/84

摘要： Provided is an SOI wafer manufacturing method that allows production of an SOI wafer having a high gettering ability and a small resistance variance in a thickness direction of an active layer, at high productivity. The SOI wafer manufacturing method includes a first step of implanting light element ions to a surface of at least one of a first substrate and a second substrate to form, on the at least one of the first substrate and the second substrate, a modified layer in which the light element ions are present in solid solution, a second step of forming an oxide film on a surface of at least one of the first substrate and the second substrate, a third step of bonding the first substrate and the second substrate according to a bonding thermal processing, and a fourth step of obtaining an active layer by thinning the first substrate.