公开(公告)号：US06674151B1

公开(公告)日：2004-01-06

申请号：US09379055

申请日：1999-08-23

申请人： Sundar S. Chetlur ,  Pradip K. Roy ,  Anthony S. Oates ,  Sidhartha Sen ,  Jonathan Z-N. Zhou

发明人： Sundar S. Chetlur ,  Pradip K. Roy ,  Anthony S. Oates ,  Sidhartha Sen ,  Jonathan Z-N. Zhou

IPC分类号： H01L29167

CPC分类号： H01L21/28211 ,  H01L21/28176 ,  H01L21/3003 ,  H01L21/76843

摘要： A semiconductor device having trap sites passivated with deuterium has enhanced immunity to hot carrier effects. The trap sites which are passivated with deuterium are encapsulated beneath a barrier film and are therefore resistant to having the deuterium diffuse away from the trap sites during subsequent high temperature processing operations.

摘要翻译： 具有用氘钝化的捕获位点的半导体器件增强了对热载体效应的免疫力。 用氘钝化的捕集点被封装在阻挡膜下面，因此在随后的高温处理操作期间，氘能够使氘扩散离开捕获位点。

公开(公告)号：US06391668B1

公开(公告)日：2002-05-21

申请号：US09562346

申请日：2000-05-01

申请人： Carlos M. Chacon ,  Sundar S. Chetlur ,  Brian E. Harding ,  Minesh A. Patel ,  Pradip K. Roy

发明人： Carlos M. Chacon ,  Sundar S. Chetlur ,  Brian E. Harding ,  Minesh A. Patel ,  Pradip K. Roy

IPC分类号： H01L2166

CPC分类号： H01L22/14

摘要： The present invention provides a method of determining a trap density of a semiconductor substrate/dielectric interface. In one embodiment, the method comprises measuring a current within a semiconductor substrate resulting from a flow of carriers from traps located near the interface, wherein the measured current is a function of the number of traps located at the interface, and determining the trap density as a function of the measured current.

摘要翻译： 本发明提供一种确定半导体衬底/电介质界面的阱密度的方法。 在一个实施例中，该方法包括测量由位于接口附近的陷阱的载流子导致的半导体衬底内的电流，其中测量的电流是位于界面处的陷阱的数量的函数，并且将陷阱密度确定为 测量电流的函数。

公开(公告)号：US06228748B1

公开(公告)日：2001-05-08

申请号：US09370963

申请日：1999-08-10

申请人： Steven M. Anderson ,  Sundar S. Chetlur

发明人： Steven M. Anderson ,  Sundar S. Chetlur

IPC分类号： H01L21322

CPC分类号： H01L21/76838 ,  H01L21/76802 ,  Y10S438/906

摘要： The present invention provides a method of using a getter layer on a semiconductor substrate having a first metal stack formed thereon to improve metal to metal contact resistance. The method comprises the steps of forming a getter layer, which may be titanium, on the first metal stack, wherein the getter layer has a higher affinity for oxygen or a higher getter capability than the first metal stack, substantially removing the getter layer by exposing the getter layer to radiation, and forming a second metal stack, which in an advantageous embodiment may also be titanium, on the first metal stack.

摘要翻译： 本发明提供一种在其上形成有第一金属叠层的半导体衬底上使用吸气剂层以提高金属与金属接触电阻的方法。 该方法包括以下步骤：在第一金属叠层上形成可为钛的吸气剂层，其中吸气剂层具有比第一金属叠层更高的氧亲合力或更高的吸气能力，通过暴露基本上去除吸气剂层 吸气剂层辐射，并且在第一金属叠层上形成第二金属叠层，其在有利的实施例中也可以是钛。

公开(公告)号：US06693434B2

公开(公告)日：2004-02-17

申请号：US09768729

申请日：2001-01-24

申请人： Sundar S. Chetlur ,  Pradip K. Roy ,  Johathan Z. Zhou

发明人： Sundar S. Chetlur ,  Pradip K. Roy ,  Johathan Z. Zhou

IPC分类号： G01R313163

CPC分类号： G01R31/27 ,  G01R31/2824

摘要： An automated system for, and method of estimating ring oscillator reliability and testing AC response of a device under test (DUT). In one embodiment, the system includes: (1) a DUT board that accepts, and allows electrical communication with, a plurality of DUTs, (2) a power source, couplable to the DUT board, that provides AC power of controllable characteristics to the plurality of DUTs and (3) an automated switching matrix, couplable between the DUT board and a circuit analyzer, that allows the circuit analyzer to analyze ring oscillators and predetermined portions of the plurality of DUTs at predetermined times as the power source provides the power thereto.

摘要翻译： 一种用于估计环形振荡器可靠性和测试被测设备（DUT）的交流响应的自动化系统及方法。 在一个实施例中，系统包括：（1）DUT板，其接受并允许与多个DUT进行电气通信，（2）可耦合到DUT板的电源，其向所述DUT板提供可控特性的AC功率 多个DUT和（3）自动切换矩阵，可耦合在DUT板和电路分析器之间，允许电路分析仪在电源向其提供电力的情况下在预定时间内分析环形振荡器和多个DUT的预定部分 。

公开(公告)号：US06187665B1

公开(公告)日：2001-02-13

申请号：US09378856

申请日：1999-08-23

申请人： Sundar S. Chetlur ,  Pradip K. Roy ,  Anthony S. Oates ,  Sidhartha Sen ,  Jonathan Z-N. Zhou

发明人： Sundar S. Chetlur ,  Pradip K. Roy ,  Anthony S. Oates ,  Sidhartha Sen ,  Jonathan Z-N. Zhou

IPC分类号： H01L21366

CPC分类号： H01L21/28211 ,  H01L21/28176 ,  H01L21/3003 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76843 ,  H01L21/76861

摘要： A process sequence for forming a semiconductor device utilizes a passivation annealing process using deuterium which enhances immunity to hot carrier effects and extends device lifetime. The process sequence is carried out prior to the introduction of metal conductive films to the device. The process sequence includes a three-step passivation, de-passivation, re-passivation sequence and utilizes a barrier film to encapsulate deuterium molecules in the vicinity of a gate oxide, during the de-passivation operation.

摘要翻译： 用于形成半导体器件的工艺顺序利用使用氘的钝化退火工艺，其增强了对热载流子效应的抗扰性并延长了器件寿命。 在将金属导电膜引入器件之前进行处理顺序。 在去钝化操作期间，工艺顺序包括三步钝化，去钝化，再钝化序列，并且利用阻挡膜将氘分子包封在栅氧化物附近。

公开(公告)号：US06576521B1

公开(公告)日：2003-06-10

申请号：US09056555

申请日：1998-04-07

申请人： Samir Chaudhry ,  Sundar S. Chetlur ,  Hem M. Vaidya

发明人： Samir Chaudhry ,  Sundar S. Chetlur ,  Hem M. Vaidya

IPC分类号： H01L21336

CPC分类号： H01L29/6659 ,  H01L21/2652

摘要： A NMOSFET semiconductor device is formed having an LDD structure by simultaneous co-implantation of arsenic and phosphorous to form an N− layer. The co-implantation is performed subsequent to the formation of the gate structure and a thin (100 Å-300 Å) gate spacer but prior to the implantation of a highly doped N+ source/drain.

摘要翻译： 通过同时共同注入砷和磷形成具有LDD结构的NMOSFET半导体器件以形成N层。 在形成栅极结构和薄（100-300）栅极间隔之后，但在注入高掺杂N +源极/漏极之前进行共同注入。

公开(公告)号：US5989984A

公开(公告)日：1999-11-23

申请号：US946413

申请日：1997-10-07

申请人： Steven M. Anderson ,  Sundar S. Chetlur

发明人： Steven M. Anderson ,  Sundar S. Chetlur

IPC分类号： H01L21/768 ,  H01L21/30 ,  H01L21/44

CPC分类号： H01L21/76838 ,  H01L21/76802 ,  Y10S438/906

摘要： The present invention provides a method of using a getter layer on a semiconductor substrate having a first metal stack formed thereon to improve metal to metal contact resistance. The method comprises the steps of forming a getter layer, which may be titanium, on the first metal stack, wherein the getter layer has a higher affinity for oxygen or a higher getter capability than the first metal stack, substantially removing the getter layer by exposing the getter layer to radiation, and forming a second metal stack, which in an advantageous embodiment may also be titanium, on the first metal stack.

摘要翻译： 本发明提供一种在其上形成有第一金属叠层的半导体衬底上使用吸气剂层以提高金属与金属接触电阻的方法。 该方法包括以下步骤：在第一金属叠层上形成可为钛的吸气剂层，其中吸气剂层具有比第一金属叠层更高的氧亲合力或更高的吸气能力，通过暴露基本上去除吸气剂层 吸气剂层辐射，并且在第一金属叠层上形成第二金属叠层，其在有利的实施例中也可以是钛。