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    Cooperation method and system between send mechanism and IPSec protocol in IPV6 environment
    1.
    发明授权
    Cooperation method and system between send mechanism and IPSec protocol in IPV6 environment 有权
    IPV6环境下的发送机制与IPSec协议的协作方法和系统

    公开(公告)号：US08819790B2

    公开(公告)日：2014-08-26

    申请号：US12040355

    申请日：2008-02-29

    申请人： Young-Ik Eom ,  Kwang-Sun Ko ,  Hyun-Su Jang ,  Hyun-jin Cho ,  Yong-Woo Jung ,  Hyun-Woo Choi ,  Gye-Hyeon Gyeong ,  Jung-Hwan Choi ,  Zhen Zhao ,  Tae-Hyoung Kim ,  Youn-Woo Kim

    发明人： Young-Ik Eom ,  Kwang-Sun Ko ,  Hyun-Su Jang ,  Hyun-jin Cho ,  Yong-Woo Jung ,  Hyun-Woo Choi ,  Gye-Hyeon Gyeong ,  Jung-Hwan Choi ,  Zhen Zhao ,  Tae-Hyoung Kim ,  Youn-Woo Kim

    IPC分类号： H04L9/32 ,  G06F21/00 ,  H04L29/06

    CPC分类号： H04L63/164

    摘要： The present invention relates to a method of embodying a cooperation system between SEND and IPSec in an IPv6 environment. The cooperation system between SEND and IPSec in accordance with the present invention includes: receiving an authentication completion report message including a first IP address of a host whose authentication is completed by the SEND; generating new authentication information corresponding to the host and storing the new authentication information in a temporary storage area, if authentication information for the host is not present in the temporary storage area, wherein the authentication information includes the first IP address; and if an authentication check request message including a second IP address is received from the IPSec, checking whether the second IP address is present in the temporary storage area, and sending the result of checking to the IPSec. The present invention allows the authentication information shared between SEND and IPSec in a mobile environment, where the network is frequently accessed, enabling IPSec secure communication at a lower cost.

    摘要翻译： 本发明涉及在IPv6环境中体现SEND与IPSec之间的协作系统的方法。 根据本发明的SEND和IPSec之间的协作系统包括：接收认证完成报告消息，该消息包括通过SEND完成认证的主机的第一IP地址; 生成与所述主机对应的新认证信息，并将所述新认证信息存储在临时存储区域中，如果所述主机的认证信息不存在于所述临时存储区域中，则所述认证信息包括所述第一IP地址; 并且如果从IPSec接收到包含第二IP地址的认证检查请求消息，则检查该临时存储区域中是否存在第二IP地址，并向IPSec发送检查结果。 本发明允许在经常访问网络的移动环境中在SEND和IPSec之间共享的认证信息以更低的成本实现IPSec安全通信。

    Method for controlling external device and transmitting apparatus and receiving apparatus thereof
    2.
    发明授权
    Method for controlling external device and transmitting apparatus and receiving apparatus thereof 有权
    用于控制外部设备及其发送设备及其接收设备的方法

    公开(公告)号：US08717148B2

    公开(公告)日：2014-05-06

    申请号：US12787207

    申请日：2010-05-25

    申请人： Tae Hyoung Kim ,  Woo Jin Jeong ,  Man Gu Kwon

    发明人： Tae Hyoung Kim ,  Woo Jin Jeong ,  Man Gu Kwon

    IPC分类号： G06F3/00 ,  H04N5/445 ,  G06F9/00

    CPC分类号： H04N21/4312 ,  G06F3/04817 ,  G06F3/0482 ,  G08C17/02 ,  G08C23/04 ,  G08C2201/40 ,  H04N5/268

    摘要： A method for controlling an external device and a signal transmitting and receiving apparatus thereof. The method for controlling an external device in a receiving apparatus that receives media signals from a transmitting apparatus connected through a wireless network, includes according to an embodiment: receiving information on the external devices connected to the transmitting apparatus from the transmitting apparatus; and displaying the external devices connected to the transmitting apparatus by using the received information.

    摘要翻译： 一种用于控制外部设备的方法及其信号发送和接收设备。 用于控制从通过无线网络连接的发送装置接收媒体信号的接收装置中的外部设备的方法包括：根据实施例：从发送装置接收与发送装置连接的外部设备的信息; 以及通过使用接收到的信息来显示连接到发送装置的外部设备。

    METHOD OF EXCHANGING MESSAGES AND TRANSMITTING AND RECEIVING DEVICES
    4.
    发明申请
    METHOD OF EXCHANGING MESSAGES AND TRANSMITTING AND RECEIVING DEVICES 有权
    交换信息和发送和接收设备的方法

    公开(公告)号：US20100315964A1

    公开(公告)日：2010-12-16

    申请号：US12621926

    申请日：2009-11-19

    申请人： Taek Soo KIM ,  Duk Ho CHO ,  Tae Hyoung KIM

    发明人： Taek Soo KIM ,  Duk Ho CHO ,  Tae Hyoung KIM

    IPC分类号： H04L12/26

    CPC分类号： H04W24/08 ,  H04L45/121 ,  H04L45/308 ,  H04W24/10

    摘要： A method of exchanging a round trip time between a transmitting device and a receiving device in a wireless network comprises receiving an echo request command from an audio video control (AVC) layer to a medium access control (MAC) layer, the echo request command including a first identifier for identifying the transmitting device, a second identifier for identifying the receiving device, and a third identifier; transferring a MAC message from the MAC layer to a physical layer, the MAC message including a message preamble, a message type, and the echo request command; transmitting a first physical layer data unit to the receiving device, the first physical layer data unit including at least one header, the MAC message, and audio/video (A/V) data; and receiving a second physical layer data unit from the receiving device, the second physical layer data unit including an echo report command in response to the echo request command, the echo report command including the third identifier.

    摘要翻译： 一种在无线网络中的发送装置与接收装置之间交换往返时间的方法包括从音频视频控制（AVC）层接收到媒体接入控制（MAC）层的回波请求命令，所述回波请求命令包括 用于识别发送设备的第一标识符，用于标识接收设备的第二标识符和第三标识符; 将MAC消息从MAC层传送到物理层，所述MAC消息包括消息前导码，消息类型和回显请求命令; 将第一物理层数据单元发送到所述接收设备，所述第一物理层数据单元包括至少一个报头，所述MAC消息和音频/视频（A / V）数据; 以及从所述接收设备接收第二物理层数据单元，所述第二物理层数据单元响应于所述回声请求命令包括回声报告命令，所述回声报告命令包括所述第三标识符。

    ARBITRATION CIRCUIT TO ARBITRATE CONFLICT BETWEEN READ/WRITE COMMAND AND SCAN COMMAND AND DISPLAY DRIVER INTEGRATED CIRCUIT HAVING THE SAME
    5.
    发明申请
    ARBITRATION CIRCUIT TO ARBITRATE CONFLICT BETWEEN READ/WRITE COMMAND AND SCAN COMMAND AND DISPLAY DRIVER INTEGRATED CIRCUIT HAVING THE SAME 有权
    仲裁电路对读/写命令和扫描命令之间的冲突进行仲裁，并显示具有该命令的驱动器集成电路

    公开(公告)号：US20100177106A1

    公开(公告)日：2010-07-15

    申请号：US12686508

    申请日：2010-01-13

    申请人： Wan-jung Kim ,  Chan-ho Lee ,  Tae-hyoung Kim

    发明人： Wan-jung Kim ,  Chan-ho Lee ,  Tae-hyoung Kim

    IPC分类号： G09G5/39 ,  G09G5/00

    CPC分类号： G09G5/001 ,  G09G3/20 ,  G09G5/39

    摘要： An arbitration circuit to arbitrate an issue between a read/write command and a scan command and a display driver integrated circuit including the arbitration circuit. The arbitration circuit includes a latch unit having a first latch circuit that latches and outputs a first signal related to a scan command and a second latch circuit that latches and outputs a second signal related to a read/write command, wherein the latch unit resets outputs of the first latch circuit and/or the second latch circuit in response to a ready signal related to a memory operation, and a maintaining unit to receive outputs of the first latch circuit and the second latch circuit, to generate a first internal signal to activate a scanning operation and a second internal signal to activate a reading/writing operation, maintain the first internal signal and the second internal signal, and to selectively activate the first internal signal or the second internal signal by changing the state of at least one of the first internal signal and second internal signal in response to the reset operation.

    摘要翻译： 仲裁电路，用于仲裁读/写命令和扫描命令之间的问题以及包括仲裁电路的显示驱动器集成电路。 仲裁电路包括一个锁存单元，该锁存单元具有锁存和输出与扫描命令有关的第一信号的第一锁存电路和锁存并输出与读/写命令相关的第二信号的第二锁存电路，其中锁存单元复位输出 的第一锁存电路和/或第二锁存电路响应于与存储器操作相关的就绪信号，以及维持单元，用于接收第一锁存电路和第二锁存电路的输出，以产生第一内部信号以激活 扫描操作和第二内部信号以激活读/写操作，保持第一内部信号和第二内部信号，并且通过改变第一内部信号或第二内部信号中的至少一个的状态来选择性地启动第一内部信号或第二内部信号 第一内部信号和第二内部信号响应复位操作。

    Non-heating type fluid sterilizing apparatus
    6.
    发明授权
    Non-heating type fluid sterilizing apparatus 失效
    非加热型流体灭菌装置

    公开(公告)号：US07586104B2

    公开(公告)日：2009-09-08

    申请号：US11649582

    申请日：2007-01-04

    申请人： Tae-Hyoung Kim

    发明人： Tae-Hyoung Kim

    IPC分类号： C02F1/32 ,  A61L2/10

    CPC分类号： A61L2/0011 ,  A61L2/0088 ,  A61L2/10 ,  A61L2/24

    摘要： A non-heating type fluid sterilizing apparatus can efficiently sterilize a fluid having high turbidity and a large quantity of solid matter or a fluid such as blood having low transmissivity of ultraviolet radiation, as well as sterilize either a single fluid in large quantity or various fluids in small quantity. The non-heating type fluid sterilizing apparatus includes a cooling tank integrally connected with a coolant inlet and a coolant outlet in order to introduce, store, and discharge a coolant; a plurality of supporting frames supporting the cooling tank; a plurality of ultraviolet lamps stacked vertically between the opposite supporting frames; a plurality of quartz tubes having the ultraviolet lamps housed therein, respectively; a fluid drainpipe installed across the cooling tank so as to be perpendicular to the ultraviolet lamps; and a spiral tube installed on an outer circumference of the fluid drainpipe, and having a fluid inlet into which a fluid flows, a tube winding, and a fluid outlet connected to the fluid drainpipe.

    摘要翻译： 非加热型流体灭菌装置能够高效地对具有高浊度的液体和大量的固体物质或具有低透射率的紫外线辐射的血液等的流体进行灭菌，并且对大量的单一流体或各种流体进行灭菌 少量。 非加热型流体灭菌装置包括与冷却剂入口和冷却剂出口一体连接的冷却罐，以便引入，储存和排出冷却剂; 支撑冷却箱的多个支撑框架; 在相对的支撑框架之间垂直堆叠的多个紫外线灯; 分别容纳有紫外灯的多个石英管; 一个安装在冷却箱上的流体排水管，以便垂直于紫外线灯; 以及螺旋管，其安装在流体排水管的外周上，并且具有流体流入的流体入口，管绕组和连接到流体排水管的流体出口。

    Semiconductor memory device with selectively connectable segmented bit line member and method of driving the same
    9.
    发明授权
    Semiconductor memory device with selectively connectable segmented bit line member and method of driving the same 有权
    具有可选择地连接的分段位线构件的半导体存储器件及其驱动方法

    公开(公告)号：US06952363B2

    公开(公告)日：2005-10-04

    申请号：US10785185

    申请日：2004-02-25

    申请人： Tae-Joong Song ,  Tae-Hyoung Kim

    发明人： Tae-Joong Song ,  Tae-Hyoung Kim

    IPC分类号： G11C11/41 ,  G11C7/00 ,  G11C7/12 ,  G11C7/18 ,  G11C8/12 ,  G11C8/16 ,  G11C11/00 ,  G11C11/413

    CPC分类号： G11C7/12 ,  G11C7/18 ,  G11C8/12

    摘要： A semiconductor memory device, that reduces load capacitance of write-only bit lines, may include: a first bit cell array block, in which bit cells thereof are defined by intersections of first bit lines and first word lines, the first bit lines being arranged as pairs of first signal lines and second signal lines, respectively; a second bit cell array block, in which bit cells thereof are defined by intersections of second bit lines and second word lines, the second bit lines being arranged as pairs of third signal lines and the second signal lines; respectively; a block division circuit operable to generate and output block division control signals; and a write bit line divider circuit operable to either open-circuit or connect together the first signal lines and the third signal lines, respectively, according to the block division control signals.

    摘要翻译： 减少只写位线的负载电容的半导体存储器件可以包括：第一位单元阵列块，其中位单元由第一位线和第一字线的交点限定，第一位线被布置 分别作为第一信号线和第二信号线的对; 第二位单元阵列块，其中位单元由第二位线和第二字线的交点限定，第二位线被布置为第三信号线和第二信号线对; 分别; 块分割电路，用于产生和输出块分割控制信号; 以及写位线分频器电路，其可操作以分别根据块分割控制信号来开路或连接第一信号线和第三信号线。

    Synchronous mirror delay circuit with adjustable locking range
    10.
    发明授权
    Synchronous mirror delay circuit with adjustable locking range 失效
    同步镜延时电路具有可调锁定范围

    公开(公告)号：US06933758B2

    公开(公告)日：2005-08-23

    申请号：US10308453

    申请日：2002-12-03

    申请人： Tae-Hyoung Kim ,  Yong-Jin Yoon ,  Nam-Seog Kim ,  Kwang-Jin Lee

    发明人： Tae-Hyoung Kim ,  Yong-Jin Yoon ,  Nam-Seog Kim ,  Kwang-Jin Lee

    IPC分类号： G06F1/12 ,  G06F1/10 ,  H03K5/15 ,  H03L7/00 ,  H03L7/081 ,  H03L7/087

    CPC分类号： H03L7/0814 ,  H03L7/087

    摘要： A synchronous mirror delay circuit comprises a delay monitor circuit for delaying a reference clock signal from a clock buffer circuit. A forward delay array sequentially delays an output clock signal of the delay monitor circuit to generate delay clock signals, and the mirror control circuit detects a delay clock signal synchronized with the reference clock signal among the delay clock signals. A backward delay array delays a clock signal delayed by the mirror control circuit, and a clock driver receives an output clock signal of the backward delay array to generate the internal clock signal. A locking range control circuit controls a delay time of each clock signal transferred to the delay monitor circuit by the amount of a delay time of each signal transferred to the clock driver when none of delay clock signals of the forward delay array is synchronized with the reference clock signal.

    摘要翻译： 同步镜延迟电路包括用于延迟来自时钟缓冲电路的参考时钟信号的延迟监视电路。 正向延迟阵列顺序地延迟延迟监视电路的输出时钟信号以产生延迟时钟信号，并且镜像控制电路在延迟时钟信号中检测与参考时钟信号同步的延迟时钟信号。 后向延迟阵列延迟由镜像控制电路延迟的时钟信号，并且时钟驱动器接收反向延迟阵列的输出时钟信号以产生内部时钟信号。 当前向延迟阵列的延迟时钟信号与参考信号同步时，锁定范围控制电路控制传送到延迟监视器电路的每个时钟信号的延迟时间达到传送到时钟驱动器的每个信号的延迟时间量 时钟信号。