公开(公告)号：US08081936B2

公开(公告)日：2011-12-20

申请号：US12626621

申请日：2009-11-26

申请人： Chi-Hsueh Wang ,  Chun-Ming Kuo ,  Ying-Ying Chen ,  Tai-Yuan Yu

发明人： Chi-Hsueh Wang ,  Chun-Ming Kuo ,  Ying-Ying Chen ,  Tai-Yuan Yu

IPC分类号： H04B17/00

CPC分类号： H04L27/0014 ,  H03H17/0294 ,  H03H17/04 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0053 ,  H04L2027/0069 ,  H04L2027/0071

摘要： A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one loop gain calibration result by performing loop gain calibration based upon signals of at least a portion of the transmitter, and obtaining at least one resistance-capacitance (RC) detection result by performing RC detection on the portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein, wherein the RC detection result corresponds to a detected value representing a product of a resistance value and a capacitance value, and the digital compensation filter includes a gain compensation module and an RC compensation module; and tuning the digital compensation filter by respectively inputting the loop gain calibration result and the RC detection result into the gain compensation module and the RC compensation module. An associated digital compensation filter and an associated calibration circuit are also provided.

摘要翻译： 用于调谐发射机内的数字补偿滤波器的方法包括：通过基于发射机的至少一部分的信号执行环路增益校准来获得至少一个环路增益校准结果，并获得至少一个电阻电容（RC）检测 通过对发送器的部分执行RC检测而不分别测量电阻器中的电阻值和其中的电容器的电容值，其结果是RC检测结果对应于表示电阻值和电容值的乘积的检测值， 数字补偿滤波器包括增益补偿模块和RC补偿模块; 并通过分别将增益校准结果和RC检测结果输入到增益补偿模块和RC补偿模块中来调谐数字补偿滤波器。 还提供了相关联的数字补偿滤波器和相关联的校准电路。

公开(公告)号：US07714666B2

公开(公告)日：2010-05-11

申请号：US11745611

申请日：2007-05-08

申请人： Ling-Wei Ke ,  Tai Yuan Yu ,  Hsin-Hung Chen

发明人： Ling-Wei Ke ,  Tai Yuan Yu ,  Hsin-Hung Chen

IPC分类号： H03L7/00

CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095

摘要： A phase locked loop frequency synthesizer including a phase locked loop, a frequency regenerator and a modulation processor, resistant to distortion induced by the frequency regenerator and conforming to transmission specifications. The phase locked loop comprises a detector generating a phase detection signal based on phase difference between a reference signal and a feedback signal, a loop filter, a voltage control oscillator generating a first output modulation signal and a frequency dividing unit varying a division factor based on a processed input modulation signal and dividing the frequency of the first output modulation signal by a division factor to generate the feedback signal. The frequency regenerator generates a second output modulation signal with a frequency range not overlapping an output frequency range of the voltage control oscillator. The modulation processor generates the processed input modulation signal to adjust the division factor of the frequency dividing unit and compensating for distortion induced by the frequency regenerator.

摘要翻译： 一种锁相环频率合成器，包括锁相环，频率再生器和调制处理器，能够抵抗由频率再生器引起的失真并符合传输规范。 锁相环包括检测器，其基于参考信号和反馈信号之间的相位差产生相位检测信号，环路滤波器，产生第一输出调制信号的电压控制振荡器和基于 经处理的输入调制信号，并将第一输出调制信号的频率除以分频因子以产生反馈信号。 频率再生器产生频率范围不与压控振荡器的输出频率范围重叠的第二输出调制信号。 调制处理器产生经处理的输入调制信号，以调整分频单元的分频因子并补偿由频率再生器引起的失真。

公开(公告)号：US07486118B2

公开(公告)日：2009-02-03

申请号：US11690144

申请日：2007-03-23

申请人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

IPC分类号： H03L7/06

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/1976

摘要： A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode.

摘要翻译： 公开了一种根据输入信号产生合成信号的信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置; 用于检测参考信号以产生校准信号的检测装置; 滤波装置，用于根据校准信号对输入信号进行滤波和校准输入信号，以产生经滤波的输入信号; 以及调制装置，用于在正常操作模式下调制滤波后的输入信号，并根据校准模式中的第一因素设置或第二因素设置设置分频因子。

公开(公告)号：US20080157823A1

公开(公告)日：2008-07-03

申请号：US11616933

申请日：2006-12-28

申请人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

发明人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

IPC分类号： H03B5/00 ,  H03M3/02

CPC分类号： H03L7/1976

摘要： A dynamic carrying method to prevent saturation of a sigma-delta modulator of a phase locked loop frequency synthesizer. The phase locked loop frequency synthesizer using the dynamic carrying method comprises a forward portion receiving a reference frequency signal and a first frequency signal to generate an output carrier signal; a multi-modulus divider dividing the output carrier signal frequency to generate the first frequency signal; a dynamic carrying device receiving and separating transmitting data into a carrying part and a residue part when the transmitting data amplitude exceeds a threshold; a sigma-delta modulator receiving the residue part to generate a first modulus control signal; an auxiliary modulator receiving the carrying part to generate a second modulus control signal; and a first adder receiving the first modulus control signal, the second modulus control signal, and a third modulus control signal and outputting a modulus modulation signal to modulate the multi-modulus divider.

摘要翻译： 一种防止锁相环频率合成器的Σ-Δ调制器饱和的动态传输方法。 使用动态携带方法的锁相环频率合成器包括：接收参考频率信号的前向部分和第一频率信号，以产生输出载波信号; 分割所述输出载波信号频率以产生所述第一频率信号的多模式分频器; 当发送数据幅度超过阈值时，动态承载装置接收和分离发送数据到携带部分和剩余部分; 接收所述残余部分以生成第一模数控制信号的Σ-Δ调制器; 接收所述承载部分以产生第二模数控制信号的辅助调制器; 以及第一加法器，接收第一模数控制信号，第二模数控制信号和第三模数控制信号，并输出模调制信号以调制多模式分配器。

公开(公告)号：US08031008B2

公开(公告)日：2011-10-04

申请号：US12426981

申请日：2009-04-21

申请人： Ping-Ying Wang ,  Bing-Yu Hsieh ,  Ling-Wei Ke ,  Tai Yuan Yu

发明人： Ping-Ying Wang ,  Bing-Yu Hsieh ,  Ling-Wei Ke ,  Tai Yuan Yu

IPC分类号： H03L7/00

CPC分类号： H03L7/1976 ,  H03L7/087 ,  H03L7/093 ,  H03L7/099

摘要： A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit. The calibration current source is coupled to the LPCU. The loop bandwidth calibration circuit is coupled to a frequency divider and coupled between the input and output of the PLL. The loop bandwidth calibration circuit operates after the calibration current source injects a calibration current into the LPCU.

摘要翻译： 提供了带有环路带宽校准电路的锁相环（PLL）。 混合模式PLL包括模拟相位校正路径，数字频率校正路径，校准电流源和环路带宽校准电路。 模拟相位校正路径包括线性相位校正单元（LPCU）。 数字频率校正路径包括数字积分路径电路。 校准电流源耦合到LPCU。 环路带宽校准电路耦合到分频器并耦合在PLL的输入和输出之间。 循环带宽校准电路在校准电流源将校准电流注入LPCU之后运行。

公开(公告)号：US20100183091A1

公开(公告)日：2010-07-22

申请号：US12626621

申请日：2009-11-26

申请人： Chi-Hsueh Wang ,  Chun-Ming Kuo ,  Ying-Ying Chen ,  Tai-Yuan Yu

发明人： Chi-Hsueh Wang ,  Chun-Ming Kuo ,  Ying-Ying Chen ,  Tai-Yuan Yu

IPC分类号： H04L25/03

CPC分类号： H04L27/0014 ,  H03H17/0294 ,  H03H17/04 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0053 ,  H04L2027/0069 ,  H04L2027/0071

摘要： A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one loop gain calibration result by performing loop gain calibration based upon signals of at least a portion of the transmitter, and obtaining at least one resistance-capacitance (RC) detection result by performing RC detection on the portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein, wherein the RC detection result corresponds to a detected value representing a product of a resistance value and a capacitance value, and the digital compensation filter includes a gain compensation module and an RC compensation module; and tuning the digital compensation filter by respectively inputting the loop gain calibration result and the RC detection result into the gain compensation module and the RC compensation module. An associated digital compensation filter and an associated calibration circuit are also provided.

摘要翻译： 用于调谐发射机内的数字补偿滤波器的方法包括：通过基于发射机的至少一部分的信号执行环路增益校准来获得至少一个环路增益校准结果，并获得至少一个电阻电容（RC）检测 通过对发送器的部分执行RC检测而不分别测量电阻器中的电阻值和其中的电容器的电容值，其结果是RC检测结果对应于表示电阻值和电容值的乘积的检测值， 数字补偿滤波器包括增益补偿模块和RC补偿模块; 并通过分别将增益校准结果和RC检测结果输入到增益补偿模块和RC补偿模块中来调谐数字补偿滤波器。 还提供了相关联的数字补偿滤波器和相关联的校准电路。

公开(公告)号：US20120057653A1

公开(公告)日：2012-03-08

申请号：US13296216

申请日：2011-11-14

申请人： Chi-Hsueh Wang ,  Chun-Ming Kuo ,  Ying-Ying Chen ,  Tai-Yuan Yu

发明人： Chi-Hsueh Wang ,  Chun-Ming Kuo ,  Ying-Ying Chen ,  Tai-Yuan Yu

IPC分类号： H04L25/03

CPC分类号： H04L27/0014 ,  H03H17/0294 ,  H03H17/04 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0053 ,  H04L2027/0069 ,  H04L2027/0071

摘要： A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one resistance-capacitance (RC) detection result, wherein the digital compensation filter includes an RC compensation module; and tuning the digital compensation filter by inputting the RC detection result into the RC compensation module. For example, the RC detection result may correspond to a detected value representing a product of a resistance value and a capacitance value. In another example, the at least one RC detection result may be obtained by performing RC detection on at least a portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein. An associated digital compensation filter and an associated calibration circuit are also provided.

摘要翻译： 用于调谐发射机内的数字补偿滤波器的方法包括：获得至少一个电阻电容（RC）检测结果，其中所述数字补偿滤波器包括RC补偿模块; 并通过将RC检测结果输入RC补偿模块来调整数字补偿滤波器。 例如，RC检测结果可以对应于表示电阻值和电容值的乘积的检测值。 在另一示例中，可以通过对发射器的至少一部分执行RC检测而不分别测量电阻器中的电阻值和其中的电容器的电容值来获得至少一个RC检测结果。 还提供了相关联的数字补偿滤波器和相关联的校准电路。

公开(公告)号：US07991102B2

公开(公告)日：2011-08-02

申请号：US11858886

申请日：2007-09-20

申请人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

IPC分类号： H03D3/24

CPC分类号： H03L7/1976 ,  H03L7/085

摘要： A signal generating apparatus includes: a test data generator for generating a test data; a fractional-N phase-locked loop device coupled to the test data generator for generating a synthesized signal according to the test data when the test data is received; and a calibrating device coupled to the fractional-N phase-locked loop device for measuring power of the synthesized signal to generate a calibration signal utilized for adjusting the fractional-N phase-locked loop device.

摘要翻译： 信号发生装置包括：测试数据发生器，用于产生测试数据; 耦合到测试数据发生器的分数N锁相环装置，用于当接收到测试数据时根据测试数据产生合成信号; 以及耦合到分数N锁相环装置的校准装置，用于测量合成信号的功率，以产生用于调整分数N锁相环装置的校准信号。

公开(公告)号：US20100264993A1

公开(公告)日：2010-10-21

申请号：US12426981

申请日：2009-04-21

申请人： Ping-Ying Wang ,  Bing-Yu Hsieh ,  Ling-Wei Ke ,  Tai Yuan Yu

发明人： Ping-Ying Wang ,  Bing-Yu Hsieh ,  Ling-Wei Ke ,  Tai Yuan Yu

IPC分类号： H03L7/099

CPC分类号： H03L7/1976 ,  H03L7/087 ,  H03L7/093 ,  H03L7/099

摘要： A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit. The calibration current source is coupled to the LPCU. The loop bandwidth calibration circuit is coupled to a frequency divider and coupled between the input and output of the PLL. The loop bandwidth calibration circuit operates after the calibration current source injects a calibration current into the LPCU.

摘要翻译： 提供了带有环路带宽校准电路的锁相环（PLL）。 混合模式PLL包括模拟相位校正路径，数字频率校正路径，校准电流源和环路带宽校准电路。 模拟相位校正路径包括线性相位校正单元（LPCU）。 数字频率校正路径包括数字积分路径电路。 校准电流源耦合到LPCU。 环路带宽校准电路耦合到分频器并耦合在PLL的输入和输出之间。 循环带宽校准电路在校准电流源将校准电流注入LPCU之后运行。

公开(公告)号：US07634041B2

公开(公告)日：2009-12-15

申请号：US11616933

申请日：2006-12-28

申请人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

发明人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

IPC分类号： H04D3/24

CPC分类号： H03L7/1976

摘要： A dynamic carrying method to prevent saturation of a sigma-delta modulator of a phase locked loop frequency synthesizer. The phase locked loop frequency synthesizer using the dynamic carrying method comprises a forward portion receiving a reference frequency signal and a first frequency signal to generate an output carrier signal; a multi-modulus divider dividing the output carrier signal frequency to generate the first frequency signal; a dynamic carrying device receiving and separating transmitting data into a carrying part and a residue part when the transmitting data amplitude exceeds a threshold; a sigma-delta modulator receiving the residue part to generate a first modulus control signal; an auxiliary modulator receiving the carrying part to generate a second modulus control signal; and a first adder receiving the first modulus control signal, the second modulus control signal, and a third modulus control signal and outputting a modulus modulation signal to modulate the multi-modulus divider.

摘要翻译： 一种防止锁相环频率合成器的Σ-Δ调制器饱和的动态传输方法。 使用动态携带方法的锁相环频率合成器包括：接收参考频率信号的前向部分和第一频率信号，以产生输出载波信号; 分割所述输出载波信号频率以产生所述第一频率信号的多模式分频器; 当发送数据幅度超过阈值时，动态承载装置接收和分离发送数据到携带部分和剩余部分; 接收所述残余部分以生成第一模数控制信号的Σ-Δ调制器; 接收所述承载部分以产生第二模数控制信号的辅助调制器; 以及第一加法器，接收第一模数控制信号，第二模数控制信号和第三模数控制信号，并输出模调制信号以调制多模除法器。