公开(公告)号：US07991102B2

公开(公告)日：2011-08-02

申请号：US11858886

申请日：2007-09-20

申请人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

IPC分类号： H03D3/24

CPC分类号： H03L7/1976 ,  H03L7/085

摘要： A signal generating apparatus includes: a test data generator for generating a test data; a fractional-N phase-locked loop device coupled to the test data generator for generating a synthesized signal according to the test data when the test data is received; and a calibrating device coupled to the fractional-N phase-locked loop device for measuring power of the synthesized signal to generate a calibration signal utilized for adjusting the fractional-N phase-locked loop device.

摘要翻译： 信号发生装置包括：测试数据发生器，用于产生测试数据; 耦合到测试数据发生器的分数N锁相环装置，用于当接收到测试数据时根据测试数据产生合成信号; 以及耦合到分数N锁相环装置的校准装置，用于测量合成信号的功率，以产生用于调整分数N锁相环装置的校准信号。

公开(公告)号：US20090072911A1

公开(公告)日：2009-03-19

申请号：US11855161

申请日：2007-09-14

申请人： Ling-Wei Ke ,  Tai-Yuan Yu ,  Hsin-Hung Chen ,  Tser-Yu Lin

发明人： Ling-Wei Ke ,  Tai-Yuan Yu ,  Hsin-Hung Chen ,  Tser-Yu Lin

IPC分类号： H03L7/087 ,  H03L7/08 ,  H03L7/085

CPC分类号： H03L7/0898 ,  H03L7/087 ,  H03L7/113 ,  H03L7/18

摘要： A signal generating apparatus is disclosed. The signal generating apparatus includes a phase-locked loop device for generating a synthesized signal, wherein the phase-locked loop device includes a phase detector, a charge pump device, a filtering device, a controllable oscillator, and a switch device coupled to the controllable oscillator for selectively coupling the controllable oscillator to the filtering device or a tuning reference signal; a calibration controller generates a tuning reference signal and controls the switch device; and a first calibrator tunes the controllable oscillator into a predetermined sub-band according to a reference oscillating signal and a synthesized signal when the switch device couples the controllable oscillator to the tuning reference signal of the calibration controller.

摘要翻译： 公开了一种信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置，其中锁相环装置包括相位检测器，电荷泵装置，滤波装置，可控振荡器和耦合到可控制的开关装置 用于选择性地将可控振荡器耦合到滤波装置的振荡器或调谐参考信号; 校准控制器产生调谐参考信号并控制开关装置; 并且当开关装置将可控振荡器耦合到校准控制器的调谐参考信号时，第一校准器根据参考振荡信号和合成信号将可控振荡器调谐成预定子带。

公开(公告)号：US07634041B2

公开(公告)日：2009-12-15

申请号：US11616933

申请日：2006-12-28

申请人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

发明人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

IPC分类号： H04D3/24

CPC分类号： H03L7/1976

摘要： A dynamic carrying method to prevent saturation of a sigma-delta modulator of a phase locked loop frequency synthesizer. The phase locked loop frequency synthesizer using the dynamic carrying method comprises a forward portion receiving a reference frequency signal and a first frequency signal to generate an output carrier signal; a multi-modulus divider dividing the output carrier signal frequency to generate the first frequency signal; a dynamic carrying device receiving and separating transmitting data into a carrying part and a residue part when the transmitting data amplitude exceeds a threshold; a sigma-delta modulator receiving the residue part to generate a first modulus control signal; an auxiliary modulator receiving the carrying part to generate a second modulus control signal; and a first adder receiving the first modulus control signal, the second modulus control signal, and a third modulus control signal and outputting a modulus modulation signal to modulate the multi-modulus divider.

摘要翻译： 一种防止锁相环频率合成器的Σ-Δ调制器饱和的动态传输方法。 使用动态携带方法的锁相环频率合成器包括：接收参考频率信号的前向部分和第一频率信号，以产生输出载波信号; 分割所述输出载波信号频率以产生所述第一频率信号的多模式分频器; 当发送数据幅度超过阈值时，动态承载装置接收和分离发送数据到携带部分和剩余部分; 接收所述残余部分以生成第一模数控制信号的Σ-Δ调制器; 接收所述承载部分以产生第二模数控制信号的辅助调制器; 以及第一加法器，接收第一模数控制信号，第二模数控制信号和第三模数控制信号，并输出模调制信号以调制多模除法器。

公开(公告)号：US20090080563A1

公开(公告)日：2009-03-26

申请号：US11858886

申请日：2007-09-20

申请人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

IPC分类号： H03K9/06 ,  H03K7/06

CPC分类号： H03L7/1976 ,  H03L7/085

摘要： A signal generating apparatus is disclosed. The signal generating apparatus includes a test data generator for generating a test data; a fractional-N phase-locked loop device coupled to the test data generator for generating a synthesized signal according to the test data when the test data is received; and a calibrating device coupled to the fractional-N phase-locked loop device for measuring power of the synthesized signal to generate a calibration signal utilized for adjusting the fractional-N phase-locked loop device.

摘要翻译： 公开了一种信号发生装置。 信号发生装置包括用于产生测试数据的测试数据发生器; 耦合到测试数据发生器的分数N锁相环装置，用于当接收到测试数据时根据测试数据产生合成信号; 以及耦合到分数N锁相环装置的校准装置，用于测量合成信号的功率，以产生用于调整分数N锁相环装置的校准信号。

公开(公告)号：US20080272811A1

公开(公告)日：2008-11-06

申请号：US11690144

申请日：2007-03-23

申请人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

IPC分类号： H03L7/06

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/1976

摘要： A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode.

摘要翻译： 公开了一种根据输入信号产生合成信号的信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置; 用于检测参考信号以产生校准信号的检测装置; 滤波装置，用于根据校准信号对输入信号进行滤波和校准输入信号，以产生经滤波的输入信号; 以及调制装置，用于在正常操作模式下调制滤波后的输入信号，并根据校准模式中的第一因素设置或第二因素设置设置分频因子。

公开(公告)号：US07486118B2

公开(公告)日：2009-02-03

申请号：US11690144

申请日：2007-03-23

申请人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

IPC分类号： H03L7/06

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/1976

摘要： A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode.

摘要翻译： 公开了一种根据输入信号产生合成信号的信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置; 用于检测参考信号以产生校准信号的检测装置; 滤波装置，用于根据校准信号对输入信号进行滤波和校准输入信号，以产生经滤波的输入信号; 以及调制装置，用于在正常操作模式下调制滤波后的输入信号，并根据校准模式中的第一因素设置或第二因素设置设置分频因子。

公开(公告)号：US20080157823A1

公开(公告)日：2008-07-03

申请号：US11616933

申请日：2006-12-28

申请人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

发明人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

IPC分类号： H03B5/00 ,  H03M3/02

CPC分类号： H03L7/1976

摘要： A dynamic carrying method to prevent saturation of a sigma-delta modulator of a phase locked loop frequency synthesizer. The phase locked loop frequency synthesizer using the dynamic carrying method comprises a forward portion receiving a reference frequency signal and a first frequency signal to generate an output carrier signal; a multi-modulus divider dividing the output carrier signal frequency to generate the first frequency signal; a dynamic carrying device receiving and separating transmitting data into a carrying part and a residue part when the transmitting data amplitude exceeds a threshold; a sigma-delta modulator receiving the residue part to generate a first modulus control signal; an auxiliary modulator receiving the carrying part to generate a second modulus control signal; and a first adder receiving the first modulus control signal, the second modulus control signal, and a third modulus control signal and outputting a modulus modulation signal to modulate the multi-modulus divider.

摘要翻译： 一种防止锁相环频率合成器的Σ-Δ调制器饱和的动态传输方法。 使用动态携带方法的锁相环频率合成器包括：接收参考频率信号的前向部分和第一频率信号，以产生输出载波信号; 分割所述输出载波信号频率以产生所述第一频率信号的多模式分频器; 当发送数据幅度超过阈值时，动态承载装置接收和分离发送数据到携带部分和剩余部分; 接收所述残余部分以生成第一模数控制信号的Σ-Δ调制器; 接收所述承载部分以产生第二模数控制信号的辅助调制器; 以及第一加法器，接收第一模数控制信号，第二模数控制信号和第三模数控制信号，并输出模调制信号以调制多模式分配器。

公开(公告)号：US20080003953A1

公开(公告)日：2008-01-03

申请号：US11745611

申请日：2007-05-08

申请人： Ling-Wei Ke ,  Tai Yuan Yu ,  Hsin-Hung Chen

发明人： Ling-Wei Ke ,  Tai Yuan Yu ,  Hsin-Hung Chen

IPC分类号： H04B1/40

CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095

摘要： A phase locked loop frequency synthesizer including a phase locked loop, a frequency regenerator and a modulation processor, resistant to distortion induced by the frequency regenerator and conforming to transmission specifications. The phase locked loop comprises a detector generating a phase detection signal based on phase difference between a reference signal and a feedback signal, a loop filter, a voltage control oscillator generating a first output modulation signal and a frequency dividing unit varying a division factor based on a processed input modulation signal and dividing the frequency of the first output modulation signal by a division factor to generate the feedback signal. The frequency regenerator generates a second output modulation signal with a frequency range not overlapping an output frequency range of the voltage control oscillator. The modulation processor generates the processed input modulation signal to adjust the division factor of the frequency dividing unit and compensating for distortion induced by the frequency regenerator.

摘要翻译： 一种锁相环频率合成器，包括锁相环，频率再生器和调制处理器，能够抵抗由频率再生器引起的失真并符合传输规范。 锁相环包括检测器，其基于参考信号和反馈信号之间的相位差产生相位检测信号，环路滤波器，产生第一输出调制信号的电压控制振荡器和基于 经处理的输入调制信号，并将第一输出调制信号的频率除以分频因子以产生反馈信号。 频率再生器产生频率范围不与压控振荡器的输出频率范围重叠的第二输出调制信号。 调制处理器产生经处理的输入调制信号，以调整分频单元的分频因子并补偿由频率再生器引起的失真。

公开(公告)号：US20080232443A1

公开(公告)日：2008-09-25

申请号：US12107768

申请日：2008-04-23

申请人： Tai-Yuan Yu ,  Ping-Ying Wang ,  Ling-Wei Ke ,  Hsin-Hung Chen

发明人： Tai-Yuan Yu ,  Ping-Ying Wang ,  Ling-Wei Ke ,  Hsin-Hung Chen

IPC分类号： H03K11/00

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/0891 ,  H03L7/113 ,  H03L7/197

摘要： A signal generating apparatus for generating a synthesized signal according to an input signal is provided. The signal generating apparatus includes a phase-locked loop device and a control unit. The phase-locked loop device has a phase/frequency detector for generating a detected signal according to a reference oscillating signal and a feedback signal, a control signal generator for generating a control signal according to the detected signal, a voltage controlled oscillator for generating the synthesized signal according to the control signal, and a divider for dividing the synthesized signal according to a dividing factor to generate the feedback signal. The control unit is for controlling the control signal generator to adjust the control signal in a calibration mode to thereby adjust a frequency of the synthesized signal. The phase/frequency detector does not output the detected signal to the control signal generator in the calibration mode.

摘要翻译： 提供了一种根据输入信号产生合成信号的信号发生装置。 信号发生装置包括锁相环装置和控制单元。 锁相环装置具有相位/频率检测器，用于根据参考振荡信号和反馈信号产生检测信号，控制信号发生器，用于根据检测到的信号产生控制信号;压控振荡器，用于产生 根据控制信号的合成信号，以及用于根据分频因子对合成信号进行分频以产生反馈信号的分频器。 控制单元用于控制控制信号发生器，以在校准模式下调节控制信号，从而调整合成信号的频率。 相位/频率检测器在校准模式下不将检测到的信号输出到控制信号发生器。

公开(公告)号：US07382201B1

公开(公告)日：2008-06-03

申请号：US11690145

申请日：2007-03-23

申请人： Tai-Yuan Yu ,  Ping-Ying Wang ,  Ling-Wei Ke ,  Hsin-Hung Chen

发明人： Tai-Yuan Yu ,  Ping-Ying Wang ,  Ling-Wei Ke ,  Hsin-Hung Chen

IPC分类号： H03C3/00 ,  H03L7/06 ,  H03L7/16

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/0895 ,  H03L7/1974

摘要： A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal, the signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a control unit for controlling the control signal generator to adjust the control signal in a calibration mode to thereby adjust a frequency of the synthesized signal, wherein the phase/frequency detector does not output the detected signal to the control signal generator in the calibration mode; a detecting device for detecting the synthesized signal to generate a calibrating signal in the calibration mode; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered signal; and a modulating device for modulating the filtered signal to generate the dividing factor.

摘要翻译： 公开了一种用于根据输入信号产生合成信号的信号发生装置，所述信号发生装置包括用于产生合成信号的锁相环装置; 控制单元，用于控制所述控制信号发生器在校准模式下调节所述控制信号，从而调整所述合成信号的频率，其中所述相位/频率检测器在所述校准模式下不将所述检测信号输出到所述控制信号发生器; 检测装置，用于在校准模式中检测合成信号以产生校准信号; 滤波装置，用于根据校准信号对输入信号进行滤波和校准输入信号以产生滤波信号; 以及用于调制滤波后的信号以产生分频因子的调制装置。