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8 条记录 (耗时 0.014 秒)

    EASILY THERMALLY DECOMPOSABLE BINDER RESIN, BINDER RESIN COMPOSITION AND USE OF SAID COMPOSITION
    1.
    发明申请
    EASILY THERMALLY DECOMPOSABLE BINDER RESIN, BINDER RESIN COMPOSITION AND USE OF SAID COMPOSITION 有权
    易于分解的粘合剂树脂，粘合剂树脂组合物和合成组合物的使用

    公开(公告)号：US20120296007A1

    公开(公告)日：2012-11-22

    申请号：US13516106

    申请日：2011-01-19

    申请人： Takashi Nakatani

    发明人： Takashi Nakatani

    IPC分类号： C08K5/092

    CPC分类号： C04B35/63492 ,  C04B35/01 ,  C04B35/10 ,  C04B35/14 ,  C04B35/457 ,  C04B35/46 ,  C04B35/4682 ,  C04B35/505 ,  C04B35/632 ,  C04B35/638 ,  C04B2235/3286 ,  C04B2235/3293 ,  C08L93/04 ,  C09J193/04

    摘要： The present invention provides an easily thermally decomposable binder resin containing, as an active ingredient, a rosin derivative (A) that is obtained by subjecting a rosin (a) to distillation and a disproportionation treatment and/or hydrogenation treatment and that has a 99 wt % weight loss temperature in thermogravimetric measurement under an air atmosphere at a heating rate of 5° C./min of 500° C. or lower, a binder resin composition containing the resin, and a use of the binder resin composition.

    摘要翻译： 本发明提供一种容易热分解的粘合剂树脂，其含有作为活性成分的松香衍生物（A），其通过使松香（a）进行蒸馏和歧化处理和/或氢化处理而获得，并且具有99重量％ 在空气气氛下以5℃/分钟的500℃或更低的加热速率进行的热重量测定中的重量减少温度，含有树脂的粘合剂树脂组合物和粘合剂树脂组合物的用途。

    Delay control circuit
    3.
    发明授权
    Delay control circuit 失效
    延时控制电路

    公开(公告)号：US5900754A

    公开(公告)日：1999-05-04

    申请号：US936819

    申请日：1997-09-24

    申请人： Takashi Nakatani

    发明人： Takashi Nakatani

    IPC分类号： H03K5/135 ,  H03K5/00 ,  H03K5/13 ,  H03L7/00 ,  H03K5/159

    CPC分类号： H03K5/133 ,  H03L7/00

    摘要： A D flip-flop latches a reference clock signal in response to an output signal fed back from an output circuit. A pulse generating circuit generates a pulse in response to the output signal fedback from the output circuit. From the latched signal and the pulse generated by the pulse generating circuit, a count pulse is generated. The count pulse is output to an up/down counter. Based on the counting result of the up/down counter, a digital-to-analog conversion circuit generates a delay control signal. Using this delay control signal, the delay circuit synchronizes its output signal with the reference clock signal. It is possible to synchronize the output data signal with the reference clock signal regardless of variations in the reference clock signal, source voltage, and ambient temperature.

    摘要翻译： A D触发器响应于从输出电路反馈的输出信号而锁存参考时钟信号。 脉冲发生电路响应于从输出电路反馈的输出信号产生脉冲。 从锁存信号和由脉冲发生电路产生的脉冲，产生计数脉冲。 计数脉冲输出到上/下计数器。 基于上/下计数器的计数结果，数/模转换电路产生延迟控制信号。 使用该延迟控制信号，延迟电路将其输出信号与参考时钟信号同步。 无论参考时钟信号，源电压和环境温度如何变化，都可以将输出数据信号与参考时钟信号同步。

    Data slicing device and data slicing method for extracting data from a signal
    6.
    发明授权
    Data slicing device and data slicing method for extracting data from a signal 失效
    用于从信号中提取数据的数据切片装置和数据切片方法

    公开(公告)号：US06281934B1

    公开(公告)日：2001-08-28

    申请号：US09167660

    申请日：1998-10-07

    申请人： Takashi Nakatani

    发明人： Takashi Nakatani

    IPC分类号： H04N521

    CPC分类号： H04N7/035 ,  H03M1/0607 ,  H03M1/12

    摘要： A data slicing device includes an A/D converter for converting a video signal applied thereto into an equivalent digital signal, a sequential integrating circuit for averaging the amplitude of a dc component included in the digital signal obtained by the A/D converter, and a comparator for comparing a value of the digital signal obtained by the A/D converter with the average of the amplitude of the dc component obtained by the sequential integrating circuit so as to extract data from the digital signal.

    摘要翻译： 数据限幅装置包括用于将施加到其上的视频信号转换为等效数字信号的A / D转换器，用于对由A / D转换器获得的数字信号中包括的直流分量的振幅进行平均的顺序积分电路和 比较器，用于将由A / D转换器获得的数字信号的值与由顺序积分电路获得的直流分量的振幅的平均值进行比较，以从数字信号中提取数据。

    MODIFIER FOR RESINS, ADHESIVE COMPOSITIONS, AND THERMOPLASTIC RESIN COMPOSITIONS
    7.
    发明申请
    MODIFIER FOR RESINS, ADHESIVE COMPOSITIONS, AND THERMOPLASTIC RESIN COMPOSITIONS 审中-公开
    树脂，粘合剂组合物和热塑性树脂组合物改性剂

    公开(公告)号：US20110288208A1

    公开(公告)日：2011-11-24

    申请号：US13146419

    申请日：2010-03-11

    申请人： Takashi Nakatani ,  Takumi Okazaki

    发明人： Takashi Nakatani ,  Takumi Okazaki

    IPC分类号： C09J193/04 ,  C09F1/04

    CPC分类号： C09J133/06 ,  C08F2220/1825 ,  C08K5/0016 ,  C08K5/10 ,  C08K2201/014 ,  C08L93/04 ,  C09J11/06 ,  C09J123/10 ,  C09J133/08 ,  C09J135/06 ,  C09J153/02 ,  C09J193/04 ,  C09J2423/00 ,  C09J2433/00 ,  C09J2453/00 ,  C08F2220/1858 ,  C08F220/06

    摘要： The present invention provides a resin modifier comprising as an active ingredient a hydrogenated rosin ester in which a component having a molecular weight of 320 of a methylation product of a hydrolyzate of the hydrogenated rosin ester as measured by gas chromatography-mass spectrometry accounts for 95 wt % or greater of the total amount of the components having a molecular weight of 314 to 320; a modifier that is an optical embrittlement inhibitor for use in an adhesive polymer resin; an adhesive composition comprising the optical embrittlement inhibitor; a modifier that is a melt fluidity and adhesion improver for a thermoplastic resin; and a thermoplastic resin composition comprising the melt fluidity and adhesion improver.

    摘要翻译： 本发明提供一种树脂改性剂，其包含作为活性成分的氢化松香酯，其中通过气相色谱 - 质谱法测定的氢化松香酯的水解产物的甲基化产物的分子量为320的成分占95重量％ 分子量为314〜320的成分的总量的％以上; 作为用于粘合性聚合物树脂的光学脆化抑制剂的改性剂; 包含光学脆化抑制剂的粘合剂组合物; 作为热塑性树脂的熔体流动性和粘合改进剂的改性剂; 以及包含熔融流动性和粘合改进剂的热塑性树脂组合物。

    Clock generating circuitry
    8.
    发明授权
    Clock generating circuitry 失效
    时钟发生电路

    公开(公告)号：US06188258B1

    公开(公告)日：2001-02-13

    申请号：US09285684

    申请日：1999-04-05

    申请人： Takashi Nakatani

    发明人： Takashi Nakatani

    IPC分类号： H03L706

    CPC分类号： H03L7/23 ,  H03L7/0891 ,  H04N5/126 ,  H04N7/0352 ,  H04N9/45

    摘要： Clock generating circuitry comprises a first frequency multiplier for multiplying the frequency of a reference clock applied thereto by 2n, where n is a natural integer, and for furnishing the frequency-multiplied clock, a frequency divider for dividing the frequency of the frequency-multiplied clock furnished by the first frequency multiplier by 227, and for furnishing the frequency-divided clock, and a second frequency multiplier for multiplying the frequency of the frequency-divided clock from the frequency divider by 128, and for furnishing the frequency-multiplied clock. The reference clock can have a frequency of about 4.43 MHz.

    摘要翻译： 时钟发生电路包括：第一倍频器，用于将施加到其上的参考时钟的频率乘以2n，其中n是自然整数，并且用于提供倍频时钟，用于分频倍频时钟的频率的分频器 由第一乘法器227提供并提供分频时钟，以及第二倍频器，用于将来自分频器的分频时钟的频率乘以128，并提供倍频时钟。 参考时钟可以具有约4.43MHz的频率。