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公开(公告)号:US07276939B2
公开(公告)日:2007-10-02
申请号:US10542727
申请日:2003-01-20
申请人: Takayuki Noto , Tomoru Sato , Hiroyuki Yamauchi
发明人: Takayuki Noto , Tomoru Sato , Hiroyuki Yamauchi
IPC分类号: H03K19/0175
CPC分类号: H04L25/0278 , H03K5/086 , H03K17/08142 , H03K17/164 , H03K17/167 , H03K19/0005 , H04L25/0292
摘要: A semiconductor integrated circuit includes an input circuit for taking in signals and an output circuit for outputting signals. The input circuit is so set that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition. The output circuit is so set that the driving force during the second half of signal transition is lower than the driving force during the first half of transition. Such setting that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition reduces reflected waves during input signal transition. Such setting that the driving force during the second half of signal transition is lower than the driving force during the first half of transition suppresses production of reflected waves during the second half of signal transition. Thus, the necessity for external components, such as damping resistors and terminator resistors, for impedance matching is obviated.
摘要翻译: 半导体集成电路包括用于接收信号的输入电路和用于输出信号的输出电路。 输入电路设置为输入信号转换期间的输入阻抗低于输入信号转换时的输入阻抗。 输出电路被设定为使得信号转换的后半段的驱动力低于转换前半部分的驱动力。 在输入信号转换期间,输入信号转换期间的输入阻抗低于输入阻抗,在其他情况下比输入信号转换减少反射波。 在信号转换的后半期间的驱动力比转换的前半部分的驱动力低的设定在信号转换的后半期间抑制了反射波的产生。 因此,消除了用于阻抗匹配的诸如阻尼电阻器和终端电阻器的外部组件的必要性。
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公开(公告)号:US20060061395A1
公开(公告)日:2006-03-23
申请号:US10542727
申请日:2003-01-20
申请人: Takayuki Noto , Tomoru Sato , Hiroyuki Yamauchi
发明人: Takayuki Noto , Tomoru Sato , Hiroyuki Yamauchi
IPC分类号: H03B1/00
CPC分类号: H04L25/0278 , H03K5/086 , H03K17/08142 , H03K17/164 , H03K17/167 , H03K19/0005 , H04L25/0292
摘要: A semiconductor integrated circuit includes an input circuit for taking in signals and an output circuit for outputting signals. The input circuit is so set that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition. The output circuit is so set that the driving force during the second half of signal transition is lower than the driving force during the first half of transition. Such setting that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition reduces reflected waves during input signal transition. Such setting that the driving force during the second half of signal transition is lower than the driving force during the first half of transition suppresses production of reflected waves during the second half of signal transition. Thus, the necessity for external components, such as damping resistors and terminator resistors, for impedance matching is obviated.
摘要翻译: 半导体集成电路包括用于接收信号的输入电路和用于输出信号的输出电路。 输入电路设置为输入信号转换期间的输入阻抗低于输入信号转换时的输入阻抗。 输出电路被设定为使得信号转换的后半段的驱动力低于转换前半部分的驱动力。 在输入信号转换期间,输入信号转换期间的输入阻抗比其他情况下的输入阻抗低于输入信号转换的设置会降低输入信号转换期间的反射波。 在信号转换的后半期间的驱动力比转换的前半部分的驱动力低的设定在信号转换的后半期间抑制了反射波的产生。 因此,消除了用于阻抗匹配的诸如阻尼电阻器和终端电阻器的外部组件的必要性。
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公开(公告)号:US6031257A
公开(公告)日:2000-02-29
申请号:US95745
申请日:1998-06-11
申请人: Takayuki Noto , Eiji Oi , Yahiro Shiotsuki , Kazuo Kato , Hideki Ohagi
发明人: Takayuki Noto , Eiji Oi , Yahiro Shiotsuki , Kazuo Kato , Hideki Ohagi
IPC分类号: H01L21/822 , H01L21/82 , H01L23/485 , H01L27/04 , H01L27/118 , H01L27/10
CPC分类号: H01L24/05 , H01L24/06 , H01L24/48 , H01L27/11807 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05082 , H01L2224/05166 , H01L2224/05554 , H01L2224/05624 , H01L2224/16 , H01L2224/45144 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L24/45 , H01L2924/01004 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01033 , H01L2924/01039 , H01L2924/01057 , H01L2924/01059 , H01L2924/01074 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19043
摘要: In a CMOS gate array, each of bonding pads corresponding to input cells for signals and bonding pads corresponding to input cells for supply voltages is formed of a plurality of conductor layers, whereas each of bonding pads (non-connected pads) corresponding to input/output cells not to be used is formed of, for example, the uppermost conductor layer. Thus, the bonding pad (non-connected pad) corresponding to the input/output cell not to be used becomes greater in the thickness of an underlying insulator film and longer in its spacing from a semiconductor substrate in comparison with each of the bonding pad for the signal and the bonding pad for the supply voltage.
摘要翻译: 在CMOS栅极阵列中,与用于电源电压的输入单元相对应的用于信号的输入单元和接合焊盘对应的每个接合焊盘由多个导体层形成,而与输入/输出相对应的每个焊盘(非连接焊盘) 不使用的输出单元由例如最上面的导体层形成。 因此,与不使用的输入/输出单元相对应的接合焊盘(非连接焊盘)在下面的绝缘膜的厚度上变得更大,并且与每个用于 信号和焊盘用于供电电压。
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