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公开(公告)号:US5453913A
公开(公告)日:1995-09-26
申请号:US233334
申请日:1994-04-26
申请人: Tatsunori Koyanagi
发明人: Tatsunori Koyanagi
IPC分类号: H01L21/60 , H01L23/495 , H05K1/18
CPC分类号: H01L23/49572 , H01L2924/0002 , Y10T29/49121
摘要: A TAB tape having multiple metallic conductors arranged on the surface of a base film with substantially square device holes is formed with designed areas of stress refief formed by one or more slits and/or arrays of holes which extend outward from the corners or sides of the device holes, such that dimensional stability in the base film is improved in a direction parallel to inner leads when thermo-compression bonding is performed to connect the inner leads with IC chips resulting in improved connection reliability for connection between inner leads and IC chips.
摘要翻译: 具有布置在具有基本上为方形的装置孔的基底膜的表面上的多个金属导体的TAB带形成有由一个或多个狭缝和/或孔阵列形成的应力抵消的设计区域,其从 装置孔,使得当进行热压接以将内引线与IC芯片连接在一起时,在与内引线平行的方向上,基膜中的尺寸稳定性得到改善,从而改善了内引线和IC芯片之间的连接的连接可靠性。
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公开(公告)号:US20100051324A1
公开(公告)日:2010-03-04
申请号:US11917445
申请日:2006-06-20
CPC分类号: H05K3/002 , H05K1/028 , H05K2201/0166 , H05K2201/0191 , H05K2201/09036 , H05K2203/1184
摘要: An aspect of the present invention comprises a method of forming holes in a dielectric substrate comprising the steps of applying a layer of photoresist to a dielectric substrate, exposing portions of the photoresist to actinic radiation through a photomask to form a pattern in the photoresist for an array of holes to be etched in the substrate, developing the photoresist, etching the dielectric substrate to form an array of holes, each hole extending at least partially through the dielectric substrate, and removing the excess photoresist. Another aspect of the present invention is a method of simultaneously forming holes in a dielectric substrate some of which extend partially through the substrate and some of which extend completely through the substrate. Other aspects of the present invention are dielectric substrates formed using the methods of the invention.
摘要翻译: 本发明的一个方面包括一种在电介质衬底中形成孔的方法,包括以下步骤:将光致抗蚀剂层施加到电介质衬底上,将光致抗蚀剂的部分暴露于通过光掩模的光化辐射,以在光致抗蚀剂中形成图案, 在衬底中蚀刻的孔的阵列,显影光致抗蚀剂,蚀刻电介质衬底以形成孔阵列,每个孔至少部分延伸穿过电介质衬底,以及去除多余的光致抗蚀剂。 本发明的另一方面是在电介质基板中同时形成空穴的方法,其中一些部分延伸穿过基底,其中一些完全延伸穿过基底。 本发明的其它方面是使用本发明的方法形成的电介质基片。
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3.
公开(公告)号:US06803528B1
公开(公告)日:2004-10-12
申请号:US10088982
申请日:2002-03-26
申请人: Tatsunori Koyanagi
发明人: Tatsunori Koyanagi
IPC分类号: H05K111
CPC分类号: H05K3/421 , H05K3/388 , H05K3/4076 , H05K2201/0166 , H05K2201/0394 , H05K2201/09827 , H05K2203/0361 , H05K2203/0554 , Y10T29/49155 , Y10T29/49165
摘要: Disclosed herein are multi-layer double-sided wiring boards having an insulating layer with an opening, conductive layers on both surfaces of the insulating layer and on the inside of the opening, and an interface layer between the insulating layer and portions of the conductive layers wherein the conductive layers are in direct contact in the opening. Also disclosed are methods of fabricating such multi-layer double-sided wiring boards.
摘要翻译: 这里公开了具有开口的绝缘层,绝缘层的两个表面上的导电层和开口的内部的多层双面布线板,以及绝缘层与导电层的部分之间的界面层 其中导电层在开口中直接接触。 还公开了制造这种多层双面线路板的方法。
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