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公开(公告)号：US5739564A
公开(公告)日：1998-04-14
申请号：US460605
申请日：1995-06-01
IPC分类号： H01L21/8244 , H01L27/11 , H01L21/265 , H01L21/70
CPC分类号： H01L27/11
摘要： A static-random-access memory cell comprising floating node capacitors is disclosed. In one embodiment, the storage nodes acts as the first plates for the floating node capacitors, and a conductive member acts as the second plates for the floating node capacitors. The conductive member also electrically connects the second plates together, but is not electrically connected to other parts of the memory cell. In another embodiment, a conductive member acts as the second plates of a plurality of memory cells. The conductive member also electrically connects the second plates together, but is not electrically connected to other parts of the memory cells. Processes for forming the memory cells is also disclosed.
摘要翻译： 公开了一种包括浮动节点电容器的静态随机存取存储器单元。 在一个实施例中，存储节点用作浮动节点电容器的第一板，并且导电构件用作浮动节点电容器的第二板。 导电构件还将第二板电连接在一起，但不与存储单元的其它部分电连接。 在另一个实施例中，导电构件用作多个存储单元的第二板。 导电构件还将第二板电连接在一起，但不与存储单元的其它部分电连接。 还公开了用于形成存储单元的工艺。
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公开(公告)号：US20140273391A1
公开(公告)日：2014-09-18
申请号：US14288268
申请日：2014-05-27
IPC分类号： H01L49/02
CPC分类号： H01L28/10 , H01F17/0006 , H01L27/0207 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device structure a semiconductor substrate having a first conductivity type and a top surface. A plurality of first doped regions is at a first depth below the top surface arranged in a checkerboard fashion. The first doped regions are of a second conductivity type. A dielectric layer is over the top surface. An inductive element is over the dielectric layer, wherein the inductive element is over the first doped regions.
摘要翻译： 半导体器件结构具有第一导电类型和顶表面的半导体衬底。 多个第一掺杂区域处于以棋盘方式布置的顶表面下方的第一深度。 第一掺杂区域是第二导电类型。 电介质层在顶表面之上。 电感元件在电介质层之上，其中电感元件在第一掺杂区域之上。
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公开(公告)号：US09219107B2
公开(公告)日：2015-12-22
申请号：US14288268
申请日：2014-05-27
CPC分类号： H01L28/10 , H01F17/0006 , H01L27/0207 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device structure a semiconductor substrate having a first conductivity type and a top surface. A plurality of first doped regions is at a first depth below the top surface arranged in a checkerboard fashion. The first doped regions are of a second conductivity type. A dielectric layer is over the top surface. An inductive element is over the dielectric layer, wherein the inductive element is over the first doped regions.
摘要翻译： 半导体器件结构具有第一导电类型和顶表面的半导体衬底。 多个第一掺杂区域处于以棋盘方式布置的顶表面下方的第一深度。 第一掺杂区域是第二导电类型。 电介质层在顶表面之上。 电感元件在电介质层之上，其中电感元件在第一掺杂区域之上。
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公开(公告)号：US08766402B2
公开(公告)日：2014-07-01
申请号：US13489139
申请日：2012-06-05
CPC分类号： H01L28/10 , H01F17/0006 , H01L27/0207 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device structure a semiconductor substrate having a first conductivity type and a top surface. A plurality of first doped regions is at a first depth below the top surface arranged in a checkerboard fashion. The first doped regions are of a second conductivity type. A dielectric layer is over the top surface. An inductive element is over the dielectric layer, wherein the inductive element is over the first doped regions.
摘要翻译： 半导体器件结构具有第一导电类型和顶表面的半导体衬底。 多个第一掺杂区域处于以棋盘方式布置的顶表面下方的第一深度。 第一掺杂区域是第二导电类型。 电介质层在顶表面之上。 电感元件在电介质层之上，其中电感元件在第一掺杂区域之上。
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公开(公告)号：US5510278A
公开(公告)日：1996-04-23
申请号：US300770
申请日：1994-09-06
IPC分类号： H01L21/336 , H01L21/8244 , H01L27/11 , H01L29/786 , H01L21/786
CPC分类号： H01L29/66765 , H01L27/11 , H01L27/1108 , H01L29/78618 , H01L29/78624 , H01L29/78678 , Y10S148/109
摘要： An under-gated thin film transistor (54) having low leakage current and a high on/off current ratio is formed using a composite layer (40) of semiconducting material. In one embodiment a composite layer (40) of semiconducting layer is formed by depositing two distinct layers (34, 38) of semiconducting material over the transistor gate electrode (18). The composite layer (40) is then patterned and implanted with ions to form a source region (46) and a drain region (48) within the composite layer (40), and to define a channel region (50) and an offset drain region (52) within the composite layer (40).
摘要翻译： 使用半导体材料的复合层（40）形成具有低漏电流和高导通/截止电流比的欠门控薄膜晶体管（54）。 在一个实施例中，通过在晶体管栅电极（18）上沉积半导体材料的两个不同的层（34,38）形成半导体层的复合层（40）。 然后将复合层（40）图案化并注入离子，以在复合层（40）内形成源区（46）和漏区（48），并且限定沟道区（50）和偏移漏区 （52）内。
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公开(公告)号：US20130320490A1
公开(公告)日：2013-12-05
申请号：US13489139
申请日：2012-06-05
CPC分类号： H01L28/10 , H01F17/0006 , H01L27/0207 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device structure a semiconductor substrate having a first conductivity type and a top surface. A plurality of first doped regions is at a first depth below the top surface arranged in a checkerboard fashion. The first doped regions are of a second conductivity type. A dielectric layer is over the top surface. An inductive element is over the dielectric layer, wherein the inductive element is over the first doped regions.
摘要翻译： 半导体器件结构具有第一导电类型和顶表面的半导体衬底。 多个第一掺杂区域处于以棋盘方式布置的顶表面下方的第一深度。 第一掺杂区域是第二导电类型。 电介质层在顶表面之上。 电感元件在电介质层之上，其中电感元件在第一掺杂区域之上。
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公开(公告)号：US5543635A
公开(公告)日：1996-08-06
申请号：US455268
申请日：1995-05-31
IPC分类号： H01L21/336 , H01L21/8244 , H01L27/11 , H01L29/786 , H01L29/76 , H01L29/04 , H01L31/036 , H01L31/112
CPC分类号： H01L29/66765 , H01L27/11 , H01L27/1108 , H01L29/78618 , H01L29/78624 , H01L29/78678 , Y10S148/109
摘要： An under-gated thin film transistor (54) having low leakage current and a high on/off current ratio is formed using a composite layer (40) of semiconducting material. In one embodiment a composite layer (40) of semiconducting layer is formed by depositing two distinct layers (34, 38) of semiconducting material over the transistor gate electrode (18). The composite layer (40) is then patterned and implanted with ions to form a source region (46) and a drain region (48) within the composite layer (40), and to define a channel region (50) and an offset drain region (52) within the composite layer (40).
摘要翻译： 使用半导体材料的复合层（40）形成具有低漏电流和高导通/截止电流比的欠门控薄膜晶体管（54）。 在一个实施例中，通过在晶体管栅电极（18）上沉积半导体材料的两个不同的层（34,38）形成半导体层的复合层（40）。 然后将复合层（40）图案化并注入离子，以在复合层（40）内形成源区（46）和漏区（48），并且限定沟道区（50）和偏移漏区 （52）内。
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公开(公告)号：US5536674A
公开(公告)日：1996-07-16
申请号：US345891
申请日：1994-11-28
IPC分类号： H01L21/8244 , H01L27/11 , H01L21/70 , H01L27/00
CPC分类号： H01L27/11
摘要： A static-random-access memory cell comprising floating node capacitors is disclosed. In one embodiment, the storage nodes acts as the first plates for the floating node capacitors, and a conductive member acts as the second plates for the floating node capacitors. The conductive member also electrically connects the second plates together, but is not electrically connected to other parts of the memory cell. In another embodiment, a conductive member acts as the second plates of a plurality of memory cells. The conductive member also electrically connects the second plates together, but is not electrically connected to other parts of the memory cells. Processes for forming the memory cells is also disclosed.
摘要翻译： 公开了一种包括浮动节点电容器的静态随机存取存储器单元。 在一个实施例中，存储节点用作浮动节点电容器的第一板，并且导电构件用作浮动节点电容器的第二板。 导电构件还将第二板电连接在一起，但不与存储单元的其它部分电连接。 在另一个实施例中，导电构件用作多个存储单元的第二板。 导电构件还将第二板电连接在一起，但不与存储单元的其它部分电连接。 还公开了用于形成存储单元的工艺。
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