HANDPIECE AND HORN FOR ULTRASONIC SURGICAL INSTRUMENT
    2.
    发明申请
    HANDPIECE AND HORN FOR ULTRASONIC SURGICAL INSTRUMENT 审中-公开
    超声手术仪器的手术和手术

    公开(公告)号:US20080208231A1

    公开(公告)日:2008-08-28

    申请号:US11938936

    申请日:2007-11-13

    IPC分类号: A61B17/32

    摘要: The present invention aims to provide a handpiece and a horn for an ultrasonic surgical instrument in which better visual recognition of a tip portion of the horn can be given. The handpiece for an ultrasonic surgical instrument includes: a horn of which tip portion vibrates at an ultrasonic wave velocity; and an external cylinder for covering the horn except the tip portion. An external diameter of the tip portion of the horn is larger than an external diameter of a part covered by the external cylinder.

    摘要翻译: 本发明的目的在于提供一种用于超声波手术器械的手持件和喇叭,其中可以给出喇叭的尖端部分的更好的视觉识别。 超声波手术器械的手持件包括:尖端部以超声波速度振动的喇叭; 以及用于覆盖除了尖端部分之外的喇叭的外筒。 喇叭的前端部的外径比由外筒覆盖的部分的外径大。

    Estimation device
    4.
    发明申请
    Estimation device 有权
    估计装置

    公开(公告)号:US20070147661A1

    公开(公告)日:2007-06-28

    申请号:US11642763

    申请日:2006-12-20

    IPC分类号: G06K9/00

    CPC分类号: G06K9/00248

    摘要: An estimation device estimates a hidden state of an estimation subject from an observable state in a manner of a time series. The observable state is observed from the hidden state of the estimation subject under a procedure that has a hierarchical structure, which includes the hidden state of the estimation subject, the observable state, and an intermediate hidden state therebetween. The estimation device includes an estimation subject hidden state predicting means, an intermediate hidden state predicting means based on the state transition structure of the hidden state of the estimation subject, an intermediate hidden state likelihood observing means, an intermediate hidden state estimating means, an estimation subject hidden state likelihood observing means, estimation subject hidden state estimating means, an intermediate hidden state predicting means based on the state transition structure of the intermediate hidden state, and the mixing means.

    摘要翻译: 估计装置以时间序列的方式估计估计对象的可观察状态的隐藏状态。 从具有层次结构的程序的估计对象的隐藏状态观察可观察状态,其包括估计对象的隐藏状态,可观察状态和它们之间的中间隐藏状态。 估计装置包括估计对象隐藏状态预测装置,基于估计对象的隐藏状态的状态转移结构的中间隐藏状态预测装置,中间隐藏状态似然观察装置,中间隐藏状态估计装置,估计 被摄体隐藏状态似然观察装置,估计对象隐藏状态估计装置,基于中间隐藏状态的状态转移结构的中间隐藏状态预测装置和混合装置。

    Optical pulse pattern generator
    6.
    发明授权
    Optical pulse pattern generator 失效
    光脉冲图案发生器

    公开(公告)号:US06804433B2

    公开(公告)日:2004-10-12

    申请号:US10335990

    申请日:2003-01-03

    IPC分类号: G02B626

    摘要: An optical pulse pattern generator can generate optical pulse signals with various periods and patterns. It supplies an optical pulse from an optical pulse source to a variable optical delay line circuit including cascade-connected characteristic-variable asymmetrical Mach-Zehnder interferometers via an optical combiner and splitter. The optical pulse is fed back to the optical combiner and splitter from the final stages of the cascade-connected characteristic-variable a symmetrical Mach-Zehnder interferometers via an optical exclusive OR circuit and optical amplifier. Making directional couplers with variable coupling ratio, and directional couplers with variable coupling ratio in operation can cause the final stage of the cascade-connected characteristic-variable asymmetrical Mach-Zehnder interferometer to produce a random pulse train.

    摘要翻译: 光脉冲图案发生器可以产生具有各种周期和图案的光脉冲信号。 它通过光学组合器和分离器将光脉冲源的光脉冲提供给包括级联连接的特征可变非对称马赫 - 曾德干涉仪的可变光学延迟线电路。 光脉冲通过光学异或电路和光放大器从级联连接的特征变量的对称马赫 - 曾德干涉仪的最后级反馈到光合并器和分路器。 制造具有可变耦合比的定向耦合器和具有可变耦合比的定向耦合器可以导致级联连接的特征变量不对称马赫 - 曾德干涉仪的最后阶段产生随机脉冲串。

    CDMA encoder-decoder, CDMA communication system, WDM-CDMA communication system
    7.
    发明授权
    CDMA encoder-decoder, CDMA communication system, WDM-CDMA communication system 失效
    CDMA编码解码器,CDMA通信系统,WDM-CDMA通信系统

    公开(公告)号:US06711313B2

    公开(公告)日:2004-03-23

    申请号:US09753565

    申请日:2001-01-04

    IPC分类号: G02B626

    摘要: An optical CDMA encoder-decoder is constructed by combining arrayed-waveguide gratings, matrix optical switches, and delay lines, otherwise by combining arrayed-waveguide grating and variable delay lines, thus providing an encoding process that a wavelength change with respect to time in optical pulses. The light includes a wide spectrum band width inserted into a CDMA encoder/decoder and is demultiplexed by arrayed-waveguide gratings. Each wave length according to the demultiplexed spectrum component spreads out in the time region based on delay time differences produced by delay lines having differential optical lengths. Thus, in CDMA, the dependency of wavelengths on delay time can be set arbitrarily.

    摘要翻译: 通过组合阵列波导光栅,矩阵光开关和延迟线,否则通过组合阵列波导光栅和可变延迟线来构造光CDMA编码器 - 解码器,从而提供编码过程,其中波长相对于时间在光学中的变化 脉冲。 该光包括插入到CDMA编码器/解码器中的宽谱带宽度,并通过阵列波导光栅解复用。 根据解复用的频谱分量的每个波长基于由具有差分光学长度的延迟线产生的延迟时间差在时间区域中扩展。 因此,在CDMA中,波长对延迟时间的依赖性可以任意设定。

    METHOD FOR PRODUCING TERMINAL-EQUIPPED WIRE, TERMINAL-EQUIPPED WIRE AND TERMINAL CRIMPING DEVICE
    8.
    发明申请
    METHOD FOR PRODUCING TERMINAL-EQUIPPED WIRE, TERMINAL-EQUIPPED WIRE AND TERMINAL CRIMPING DEVICE 有权
    用于生产终端装备线的方法,终端装备的线和终端打击装置

    公开(公告)号:US20140311799A1

    公开(公告)日:2014-10-23

    申请号:US14352330

    申请日:2012-02-07

    IPC分类号: H01R43/048 H02G15/06

    摘要: The present invention aims to maximally reduce a projecting width of a projecting part formed on a terminal when the terminal is crimped to an exposed core part of an end part of a wire. To achieve this aim, a method for producing a terminal-equipped wire in which a crimping portion of a terminal is crimped to an exposed core part of an end part of a wire includes a) a step of arranging the exposed core part in the crimping portion, b) a step of sandwiching a part of the crimping portion between a lower die surface of a lower die and an upper die surface of an upper die and crimping the part of the crimping portion to the exposed core part, and c) a step of pressing an end part of the crimping portion protruding from the upper die surface from above.

    摘要翻译: 本发明的目的在于,当终端被卷曲到线的端部的暴露的芯部时,最大限度地减小形成在端子上的突出部的突出宽度。 为了实现该目的,一种端子配线的制造方法,其中端子的压接部分被卷曲到线的端部的暴露的芯部分包括:a)将暴露的芯部分布置在卷边中的步骤 b)将压接部分的一部分夹在下模的下模表面和上模的上模表面之间并将压接部的一部分压接到暴露的芯部的步骤,以及c) 从上方按压从上模表面突出的压接部的端部的步骤。

    Optical wavelength multiplexing/ de-multiplexing circuit
    9.
    发明授权
    Optical wavelength multiplexing/ de-multiplexing circuit 有权
    光波长复用/解复用电路

    公开(公告)号:US08369666B2

    公开(公告)日:2013-02-05

    申请号:US13054158

    申请日:2009-06-30

    IPC分类号: G02B6/34 H04J14/02

    摘要: An optical wavelength multiplexing/de-multiplexing circuit having a low loss and a flat transmission spectrum is provided. The optical wavelength multiplexing/de-multiplexing circuit compensates a temperature dependence of a center transmission wavelength which remains in an athermal AWG, and has an excellent accuracy of the center transmission wavelength in a whole operating temperature range or has a comparatively wide operable temperature range. The temperature dependence of the transmission wavelength in the athermal MZI is modulated and set so as to cancel the temperature dependence of the center wavelength which remains in the athermal AWG. The present invention focuses particularly on an optical coupler in the MZI and modulates the temperature dependence of the transmission wavelength in the MZI by providing the optical coupler itself with a mechanism which changes a phase difference between two outputs by temperature.

    摘要翻译: 提供具有低损耗和平坦透射光谱的光波长多路复用/解复用电路。 光波长复用/解复用电路补偿保持在无热AWG中的中心透射波长的温度依赖性,并且在整个工作温度范围内具有优异的中心透射波长精度或具有相对较宽的可操作温度范围。 在无热MZI中的透射波长的温度依赖性被调制和设定,以抵消保持在无热AWG中的中心波长的温度依赖性。 本发明特别着重于MZI中的光耦合器,并且通过为光耦合器本身提供一种通过温度改变两个输出之间的相位差的机构来调制MZI中的透射波长的温度依赖性。

    METHOD OF PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
    10.
    发明申请
    METHOD OF PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法和半导体器件

    公开(公告)号:US20120104502A1

    公开(公告)日:2012-05-03

    申请号:US13260948

    申请日:2010-03-24

    IPC分类号: H01L29/78 H01L21/336

    摘要: Disclosed is a method of producing a semiconductor device, able to form a source/drain of a Schottky junction (FET) with simple steps and able to improve the device characteristics. A gate is formed on an element region defined in a silicon substrate layer by element isolation regions (first step), the silicon substrate is etched by self-alignment using the gate and the element isolation regions as masks (second step), and an insulating film is formed on the side surfaces of the gate (third step). Then, a metal film acting as the source/drain is selectively formed on the etching region of the silicon substrate by electroless plating (fourth step).

    摘要翻译: 公开了一种制造能够以简单的步骤形成肖特基结(FET)的源极/漏极并能够改善器件特性的半导体器件的方法。 栅极通过元件隔离区域形成在限定在硅衬底层中的元件区域上(第一步骤),使用栅极和元件隔离区域作为掩模通过自对准蚀刻硅衬底(第二步骤),并且绝缘 在栅极的侧面上形成膜(第三工序)。 然后,通过无电镀在硅衬底的蚀刻区域上选择性地形成用作源极/漏极的金属膜(第四步骤)。