公开(公告)号：US20130029433A1

公开(公告)日：2013-01-31

申请号：US13361869

申请日：2012-01-30

申请人： Mei H. Sun ,  Mark Wiltse ,  Wayne G. Renken ,  Zachary Reid ,  Tony Dibiase

发明人： Mei H. Sun ,  Mark Wiltse ,  Wayne G. Renken ,  Zachary Reid ,  Tony Dibiase

IPC分类号： H01L21/66 ,  H05K3/30 ,  G01N27/00 ,  G01N19/00 ,  G01N33/00 ,  G01N21/00

CPC分类号： H01L21/67253 ,  G03F7/70616 ,  G03F7/7085 ,  G03F7/70875 ,  Y10T29/4913

摘要： An instrument comprises a substrate, a plurality of sensors distributed at positions across the substrate's surface, at least one electronic processing component on the surface, electrical conductors extending across the surface and connected to the sensors and processing component, and a cover disposed over the sensors, processing component and conductors. The cover and substrate have similar material properties to a production substrate. The cover is configured to electromagnetically shield the sensors, conductors, or processing component. The instrument has approximately the same thickness and/or flatness as the production substrate. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

摘要翻译： 仪器包括基板，分布在基板表面上的位置处的多个传感器，表面上的至少一个电子处理部件，横跨表面延伸并连接到传感器和处理部件的电导体，以及设置在传感器 ，处理部件和导体。 覆盖物和基材与生产基材具有相似的材料性质。 盖被配置为电磁屏蔽传感器，导体或处理部件。 仪器具有与生产基底大致相同的厚度和/或平坦度。 要强调的是，提供这个摘要是为了符合要求摘要的规则，允许搜索者或其他读者快速确定技术公开内容的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

公开(公告)号：US20060030061A1

公开(公告)日：2006-02-09

申请号：US11245291

申请日：2005-10-05

申请人： Tony DiBiase

发明人： Tony DiBiase

IPC分类号： H01L21/66

CPC分类号： H01L22/20 ,  H01L22/34

摘要： A process which addresses the problem of transient defects comprises first processing one or more test chips on a substrate to reveal one or more potential transient defects during subsequent processing of all of the chips on the substrate; identifying the exact locations of such potential transient defects on one or more chips of a silicon substrate; forming a file containing the coordinates of each potential transient defect on the chip; converting the file into a CAD image layer capable of displaying such potential transient defects; and displaying such potential transient defects superimposed over a CAD image of the actual circuit to permit visual inspection of the compound CAD image and to permit optional action to be taken in view of such potential transient defects. In another embodiment of the invention, the file containing the locations of the potential transient defects is transmitted to a metrology apparatus such as a critical dimension (CD) scanning electron microscope (SEM) which monitors the potential transient defect addresses during processing of the chip. The two embodiments of the invention may be practiced in the alternative or in combination with one another.

摘要翻译： 解决瞬态缺陷问题的过程包括首先处理衬底上的一个或多个测试芯片，以在衬底上的所有芯片的后续处理期间露出一个或多个潜在的瞬态缺陷; 识别硅衬底的一个或多个芯片上的这种潜在瞬态缺陷的确切位置; 形成包含芯片上每个潜在瞬态缺陷的坐标的文件; 将文件转换成能够显示这种潜在的瞬时缺陷的CAD图像层; 并且显示叠加在实际电路的CAD图像上的这种潜在的瞬时缺陷，以允许对复合CAD图像的目视检查，并且考虑到这种潜在的瞬时缺陷来允许采取可选择的动作。 在本发明的另一个实施例中，将包含潜在瞬变缺陷的位置的文件传送到计量装置，例如临界尺寸（CD）扫描电子显微镜（SEM），其在芯片处理期间监测潜在的瞬时缺陷地址。 本发明的两个实施例可以以替代方式或彼此组合来实践。

公开(公告)号：US08121396B1

公开(公告)日：2012-02-21

申请号：US11872451

申请日：2007-10-15

申请人： Tony DiBiase

发明人： Tony DiBiase

IPC分类号： G06K9/00 ,  G21K5/00

CPC分类号： G03F7/705

摘要： A method for constructing an error map for a lithography process, by constructing a first error map using spatial error data compiled on a lithography tool used in the lithography process, and constructing a second error map using spatial error data compiled on a mask used in the lithograph process, and then combining the first error map and the second error map to produce an overall error map for the lithography process. In this manner, the spatial error is determined prior to committing product to the process, and excessive error can be corrected or otherwise resolved prior to such commitment. In various embodiments, the spatial error data includes lens error data and stage movement error data. In some embodiments the spatial error data compiled on the mask is constructed by comparing mask pattern placement data to mask pattern source files. Some embodiments include the step of adjusting process variables to reduce errors represented in the overall error map.

摘要翻译： 一种用于构建光刻工艺的误差图的方法，通过使用在光刻工艺中使用的光刻工具上编译的空间误差数据构造第一误差图，以及使用在掩模中使用的掩模上编译的空间误差数据构建第二误差图 光刻工艺，然后组合第一误差图和第二误差图，以产生用于光刻工艺的总体误差图。 以这种方式，在将产品提交给过程之前确定空间误差，并且在这种承诺之前可以校正或以其他方式解决过大的误差。 在各种实施例中，空间误差数据包括透镜误差数据和平台移动误差数据。 在一些实施例中，通过将掩模图案放置数据与掩模图案源文件进行比较来构建掩模上编译的空间误差数据。 一些实施例包括调整过程变量以减少在整个误差图中表示的误差的步骤。

公开(公告)号：US07987057B1

公开(公告)日：2011-07-26

申请号：US12199747

申请日：2008-08-27

申请人： Tony DiBiase

发明人： Tony DiBiase

IPC分类号： G01R31/00

CPC分类号： G06T7/0006 ,  G06T2207/30121 ,  G06T2207/30148

摘要： A method of inspecting a pattern on a substrate, by extracting boundary locations from design data for repeating blocks within the pattern, inspecting the substrate at only the boundary locations of the repeating blocks, detecting alignment errors at the boundary locations, comparing the alignment errors to a threshold, and flagging the alignment errors that exceed the threshold. In this manner, the alignment errors that were of no consequence in larger design rule devices can be detected, and a determination can be made as to whether they adversely impact the proper operation of the integrated circuit that will eventually be formed from the pattern. By performing the inspection only on the boundary locations, a much higher magnification can be used than what would be reasonably possible for an inspection of the entire substrate.

摘要翻译： 通过从图案内的重复块的设计数据中提取边界位置，仅在重复块的边界位置处检查基板，检测边界位置处的对准误差，将对准误差与对准误差进行比较，从而检查基板上的图案的方法 阈值，并标记超过阈值的对齐错误。 以这种方式，可以检测在较大的设计规则装置中没有影响的对准误差，并且可以确定它们是否对最终由图案形成的集成电路的正确操作产生不利影响。 通过仅在边界位置进行检查，可以使用比对整个基板的检查合理可行的更高的放大率。

公开(公告)号：US07924408B2

公开(公告)日：2011-04-12

申请号：US11690813

申请日：2007-03-24

申请人： Tony DiBiase ,  Mei H. Sun ,  Mark Wiltse

发明人： Tony DiBiase ,  Mei H. Sun ,  Mark Wiltse

IPC分类号： G03B27/58 ,  G03B27/32

CPC分类号： G03F7/70875 ,  G03F7/70633

摘要： A method for reducing overlay error in a photolithographic process, by providing a substrate having a permanent layer with a first pattern disposed therein, coating the substrate with photoresist, exposing the photoresist to a second pattern, while measuring temperatures at a plurality of different first positions across the substrate, developing the second pattern in the photoresist, measuring overlay errors between the first and second patterns at a plurality of different second positions across the substrate, correlating the overlay errors with temperatures by position on the substrate, determining any relationship indicated between the correlated overlay errors and temperatures, and adjusting at least one temperature controlling aspect of the photolithographic process in response to any relationship determined.

摘要翻译： 一种通过提供具有设置在其中的具有第一图案的永久层的基板的衬底，用光致抗蚀剂涂覆衬底，将光致抗蚀剂暴露于第二图案，同时测量多个不同的第一位置处的温度的方法，用于减小光刻工艺中的覆盖误差的方法 跨越衬底，在光致抗蚀剂中显影第二图案，测量穿过衬底的多个不同第二位置处的第一和第二图案之间的重叠误差，将重叠误差与衬底上的位置的温度相关联，确定在衬底上指示的任何关系 相关重叠误差和温度，以及响应于确定的任何关系调整光刻工艺的至少一个温度控制方面。

公开(公告)号：US07846266B1

公开(公告)日：2010-12-07

申请号：US11356879

申请日：2006-02-17

申请人： Tony Dibiase

发明人： Tony Dibiase

IPC分类号： B08B7/04 ,  B08B7/00

CPC分类号： C11D11/0047 ,  C11D11/0058

摘要： Cleaning and reclaiming nano-imprint templates using environment friendly methods and systems is disclosed. A template may be cleaned by a combination of exposure to activated gaseous species followed by rinsing with oxygenated or hydrogenated DI water and exposure to reactive plasma to remove organic contaminant. Contaminant may be removed by forming a coating film of a water soluble polymer on the template and then peeling off the coating film. Organic residue from the film may be removed using oxygenated plasma.

摘要翻译： 公开了使用环境友好的方法和系统来清洁和回收纳米压印模板。 可以通过暴露于活化气体物质的组合来清洁模板，然后用氧化或氢化去离子水冲洗并暴露于反应性等离子体以除去有机污染物。 可以通过在模板上形成水溶性聚合物的涂膜，然后剥离涂膜来除去污染物。 可以使用氧化等离子体去除膜中的有机残余物。

公开(公告)号：US20080204678A1

公开(公告)日：2008-08-28

申请号：US11690813

申请日：2007-03-24

申请人： Tony DiBiase ,  Mei H. Sun ,  Mark Wiltse

发明人： Tony DiBiase ,  Mei H. Sun ,  Mark Wiltse

IPC分类号： G03B27/52 ,  G03F7/20

CPC分类号： G03F7/70875 ,  G03F7/70633

摘要： A method for reducing overlay error in a photolithographic process, by providing a substrate having a permanent layer with a first pattern disposed therein, coating the substrate with photoresist, exposing the photoresist to a second pattern, while measuring temperatures at a plurality of different first positions across the substrate, developing the second pattern in the photoresist, measuring overlay errors between the first and second patterns at a plurality of different second positions across the substrate, correlating the overlay errors with temperatures by position on the substrate, determining any relationship indicated between the correlated overlay errors and temperatures, and adjusting at least one temperature controlling aspect of the photolithographic process in response to any relationship determined.

摘要翻译： 一种通过提供具有设置在其中的具有第一图案的永久层的基板的衬底，用光致抗蚀剂涂覆衬底，将光致抗蚀剂暴露于第二图案，同时测量多个不同的第一位置处的温度的方法，用于减小光刻工艺中的覆盖误差的方法 跨越衬底，在光致抗蚀剂中显影第二图案，测量穿过衬底的多个不同第二位置处的第一和第二图案之间的重叠误差，将重叠误差与衬底上的位置的温度相关联，确定在衬底上指示的任何关系 相关重叠误差和温度，以及响应于确定的任何关系调整光刻工艺的至少一个温度控制方面。

公开(公告)号：US08104342B2

公开(公告)日：2012-01-31

申请号：US12034041

申请日：2008-02-20

申请人： Mei H. Sun ,  Mark Wiltse ,  Wayne G. Renken ,  Zachary Reid ,  Tony DiBiase

发明人： Mei H. Sun ,  Mark Wiltse ,  Wayne G. Renken ,  Zachary Reid ,  Tony DiBiase

IPC分类号： G01D11/24

CPC分类号： H01L21/67253 ,  G03F7/70616 ,  G03F7/7085 ,  G03F7/70875 ,  Y10T29/4913

摘要： An instrument for measuring a parameter comprises a substrate, a plurality of sensors carried by and distributed across a surface of the substrate that individually measure the parameter at different positions, an electronic processing component carried by the substrate surface, electrical conductors extending across the surface connected to the sensors and the electronic processing component, and a cover disposed over the sensors, electronic processing component and conductors. The cover and substrate have similar material properties to a production substrate processed by a substrate processing cell. The instrument has approximately the same thickness and/or flatness as the production substrate. The instrument may be subjected a substrate process and one or more parameters may be measured with the instrument during the process. The behavior of a production wafer in the substrate process may be characterized based on measurements of the parameters made with the one or more sensors.

摘要翻译： 用于测量参数的仪器包括基板，由基板的表面承载并分布在多个基板表面上的单独测量不同位置处的参数的多个传感器，由基板表面承载的电子处理部件，跨越表面连接的电导体 传感器和电子处理部件，以及设置在传感器，电子处理部件和导体上的盖子。 盖和基底与由基板处理单元处理的生产基板具有相似的材料特性。 仪器具有与生产基底大致相同的厚度和/或平坦度。 仪器可以经受衬底工艺，并且可以在过程期间用仪器测量一个或多个参数。 可以基于用一个或多个传感器进行的参数的测量来表征生产晶片在衬底工艺中的行为。

公开(公告)号：US20090056441A1

公开(公告)日：2009-03-05

申请号：US12034041

申请日：2008-02-20

申请人： Mei H. Sun ,  Mark Wiltse ,  Wayne G. Renken ,  Zachary Reid ,  Tony DiBiase

发明人： Mei H. Sun ,  Mark Wiltse ,  Wayne G. Renken ,  Zachary Reid ,  Tony DiBiase

IPC分类号： G01D11/00 ,  H01L21/66

CPC分类号： H01L21/67253 ,  G03F7/70616 ,  G03F7/7085 ,  G03F7/70875 ,  Y10T29/4913

摘要： An instrument for measuring a parameter comprises a substrate, a plurality of sensors carried by and distributed across a surface of the substrate that individually measure the parameter at different positions, an electronic processing component carried by the substrate surface, electrical conductors extending across the surface connected to the sensors and the electronic processing component, and a cover disposed over the sensors, electronic processing component and conductors. The cover and substrate have similar material properties to a production substrate processed by a substrate processing cell. The instrument has approximately the same thickness and/or flatness as the production substrate. The instrument may be subjected a substrate process and one or more parameters may be measured with the instrument during the process. The behavior of a production wafer in the substrate process may be characterized based on measurements of the parameters made with the one or more sensors.

摘要翻译： 用于测量参数的仪器包括基板，由基板的表面承载并分布在多个基板表面上的单独测量不同位置处的参数的多个传感器，由基板表面承载的电子处理部件，跨越表面连接的电导体 传感器和电子处理部件，以及设置在传感器，电子处理部件和导体上的盖子。 盖和基底与由基板处理单元处理的生产基板具有相似的材料特性。 仪器具有与生产基底大致相同的厚度和/或平坦度。 仪器可以经受衬底工艺，并且可以在过程期间用仪器测量一个或多个参数。 可以基于用一个或多个传感器进行的参数的测量来表征生产晶片在衬底工艺中的行为。

公开(公告)号：US07408642B1

公开(公告)日：2008-08-05

申请号：US11356878

申请日：2006-02-17

申请人： Tony DiBiase

发明人： Tony DiBiase

IPC分类号： G01B11/00

CPC分类号： G03F7/70633 ,  G03F9/7076

摘要： A combined overlay target and methods for its use are disclosed. The combined overlay target includes a grating-type overlay target and an image placement error target having substantially perpendicular features with spaced apart edges. The grating-type target and the image placement error target have a common centroid and are sufficiently separated that the grating-type overlay target does not interfere with measurement of image placement error.

摘要翻译： 公开了组合覆盖目标及其使用方法。 组合的覆盖目标包括光栅型覆盖目标和具有基本垂直的具有间隔开的边缘的特征的图像放置误差目标。 光栅型目标和图像放置误差目标具有共同的质心并被充分分离，使得光栅型覆盖目标不影响图像放置误差的测量。