Abstract:
A method for forming an interconnect of a solid oxide fuel cell includes the following steps. First of all, a powder mixture substantially including equal to or more than 90 wt % chromium powder, with the balance being iron powder and inevitable impurities, is provided. Then the powder mixture is pressurized by a pressing process with a pressure equal to or over 8 mt/cm2 to form a green interconnect with a density being equal to or over 90% of the theoretical density. Next the green interconnect is sintered by a sintering process to form an interconnect body. Finally, a protection process is performed on at least one surface of the interconnect body to form an interconnect.
Abstract:
A pressure sensor comprises a deformable membrane deflecting in response to pressure applied, a first stationary electrode, and a second electrode coupled to the deformable membrane, for determining a change in a capacitance between the first and the second electrode in response to the pressure applied. At least one of the first and the second electrode comprises a getter material for collecting gas molecules.
Abstract:
A water guiding duct positioning structure in a faucet valve base is disclosed, which may include a valve seat, at least two water guiding ducts, and a position limiting member, wherein a valve chamber is located at upper portion of the valve seat to receive a water control valve, and bottom portion of the valve seat is connected with two water inlet tubes and a water outlet tube, which have horizontal slits located at the outer periphery of the water inlet and outlet tubes for the position limiting member to plug in. The water guiding duct has a connector collar, which is installed with a water sealing ring and has at least one ring slot. The position limiting member has a horizontal holding plate, one end of which has a shoulder portion extending both sides from the holding plate.
Abstract:
A semiconductor device includes a semiconductor substrate; a gate stack overlying the substrate, a spacer formed on sidewalls of the gate stack, and a protection layer overlying the gate stack for filling at least a portion of a space surrounded by the spacer and the top surface of the gate stack. A top surface of the spacer is higher than a top surface of the gate stack.
Abstract:
An integrated circuit structure includes a semiconductor substrate including a first portion in a first device region, and a second portion in a second device region. A first semiconductor fin is over the semiconductor substrate and has a first fin height. A second semiconductor fin is over the semiconductor substrate and has a second fin height. The first fin height is greater than the second fin height.
Abstract:
The present invention provides an electrostatic discharge (ESD) protection circuit including an ESD detection circuit and a plurality of power clamp circuits. The ESD detection circuit is electrically connected to a first high power line, a second high power line and at least one low power line, and is used to detect an ESD event occurring in the first high power line and another ESD event occurring in the second high power line. The ESD detection circuit includes a first trigger unit and a second trigger unit, electrically connected to the first high power line and the second high power line respectively. Each power clamp circuit has a trigger node, and the trigger nodes are electrically connected to the first trigger unit and the second trigger unit.
Abstract:
A projecting apparatus having an adjusting function includes a projector having an adjusting side; and an adjusting device disposed at the adjusting side and including a rotatable base pivoting on the projector, a moving mechanism disposed on the projector, a fixed mechanism comprising a fixed base, and a fixed component disposed on the fixed base, and an adjusting component connected to the fixed component and the moving mechanism. When the adjusting device is adjusted, the adjusting device drives the projector to rotate about an axial center of the rotatable base.
Abstract:
A method of forming an integrated circuit structure includes providing a semiconductor substrate; providing a first lithography mask, a second lithography mask, and a third lithography mask; forming a first mask layer over the semiconductor substrate, wherein a pattern of the first mask layer is defined using the first lithography mask; performing a first etch to the semiconductor substrate to define an active region using the first mask layer; forming a second mask layer having a plurality of mask strips over the semiconductor substrate and over the active region; forming a third mask layer over the second mask layer, wherein a middle portion of the plurality of mask strips is exposed through an opening in the third mask layer, and end portions of the plurality of mask strips are covered by the third mask layer; and performing a second etch to the semiconductor substrate through the opening.
Abstract:
A splitting apparatus suitable to split a work piece along at least one cutting line formed on the work piece is provided. The splitting apparatus includes a chopper, a detector, a controller and an adjustor. The chopper is disposed above the work piece. The detector is disposed above the work piece for transmitting a signal to the work piece so as to get a specification data of the work piece. The controller connects the detector and receives the specification data and generates an adjustment data. The adjustor connects the controller and the chopper. The adjustor receives the adjustment data and adjusts a parameter data of the chopper according to the adjustment data so that the chopper splits the work piece for once along the cutting line formed on the work piece.