Method and video system for freeze-frame detection

    公开(公告)号:US09826252B2

    公开(公告)日:2017-11-21

    申请号:US14445718

    申请日:2014-07-29

    IPC分类号: H04N19/89

    CPC分类号: H04N19/89

    摘要: A method for detecting a freeze-frame condition comprises receiving a sequence of images from at least one digital device; selectively encoding a first subset of the sequence of images using a first coding scheme that causes an adjustment to an image characteristic of the selected images being encoded; selectively encoding a second subset of the sequence of images using a second coding scheme; storing the first encoded subset and second encoded subset; retrieving the stored first encoded subset and second encoded subset; selectively decoding the first subset of the selected images using the first coding scheme and selectively decoding the second subset of the selected images using the second coding scheme to re-create the sequence of images. A freeze-frame condition in the re-created sequence of images is identifiable based on a plurality of decoded images being different with respect to the image characteristic across multiple decoded image frames.

    APPARATUS AND METHOD FOR VALIDATING THE INTEGRITY OF CONTROL SIGNALS IN TIMING DOMAIN
    2.
    发明申请
    APPARATUS AND METHOD FOR VALIDATING THE INTEGRITY OF CONTROL SIGNALS IN TIMING DOMAIN 审中-公开
    用于验证时域中控制信号的完整性的装置和方法

    公开(公告)号:US20160062331A1

    公开(公告)日:2016-03-03

    申请号:US14469740

    申请日:2014-08-27

    IPC分类号: G05B19/042

    摘要: The present application relates to a signal integrity module for validating one or more control signals in time domain and a method thereof. The one or more control signals are received via a signal input from at least one control signal generating unit. A new signature is generated by a signature generating unit on the basis of a current signature and the state of the one or more control signals at a watch point. The current signature is latched into a signature register upon receiving a trigger signal. The latched signature is representative of the time course of the one or more control signals at the watch point over a monitoring period defined by the trigger signal. The latched signature is compared by a signature comparator with a pre-calculated signature to validate the integrity of the one or more control signals with respect to the time domain.

    摘要翻译: 本申请涉及用于验证时域中的一个或多个控制信号的信号完整性模块及其方法。 经由至少一个控制信号产生单元输入的信号接收一个或多个控制信号。 基于当前签名和一个或多个控制信号在观察点处的状态由签名生成单元产生新的签名。 当接收到触发信号时,当前签名被锁存到签名寄存器中。 锁存的签名表示在由触发信号定义的监视时段上的观察点处的一个或多个控制信号的时间过程。 锁存的签名由签名比较器与预先计算的签名进行比较,以验证相对于时域的一个或多个控制信号的完整性。

    Apparatus for error detection in memory devices
    3.
    发明授权
    Apparatus for error detection in memory devices 有权
    用于存储器件中的错误检测的装置

    公开(公告)号:US09436546B2

    公开(公告)日:2016-09-06

    申请号:US14258327

    申请日:2014-04-22

    IPC分类号: G11C29/00 G06F11/10

    CPC分类号: G06F11/1048

    摘要: The invention relates to an apparatus for transfer of data elements between a bus controller, such as a CPU, and a memory controller. An address translator is arranged to receive a write address from the CPU, to modify the write address and to send the modified write address to the memory controller. An ECC calculator is arranged to receive write input data associated with the write address, from the CPU, and to generate an error correction code on the basis of the write input data. A concatenator is arranged to receive the write input data from the CPU, and to receive the error correction code from the ECC calculator, and to concatenate the write input data and the error correction code to obtain write output data, and to send the write output data to the memory controller.

    摘要翻译: 本发明涉及一种用于在总线控制器(例如CPU)和存储器控制器之间传送数据元素的装置。 地址转换器被安排为从CPU接收写入地址,修改写入地址并将修改的写入地址发送到存储器控制器。 ECC计算器被布置成从CPU接收与写入地址相关联的写入输入数据,并且基于写入输入数据生成纠错码。 串联器被配置为从CPU接收写入输入数据,并从ECC计算器接收纠错码,并且连接写入输入数据和纠错码以获得写入输出数据,并发送写入输出 数据到存储器控制器。

    METHODS AND APPARATUS FOR DETECTING SOFTWARE INTEFERENCE
    4.
    发明申请
    METHODS AND APPARATUS FOR DETECTING SOFTWARE INTEFERENCE 有权
    检测软件功能的方法和设备

    公开(公告)号:US20160062810A1

    公开(公告)日:2016-03-03

    申请号:US14469775

    申请日:2014-08-27

    IPC分类号: G06F11/07 G06F11/30 G06F11/34

    摘要: The present application relates to an apparatus for detecting software interference and the method of operating thereof. A processor and at least one shared resource form a computing shell to execute a first, functional safety critical application and at least one second application in time-shared operation. One or more performance counters are provided to adjust a counter value in response to a performance related event. A reference value storage stores one or more threshold values, each of which is associated with one of the performance counters. A comparator receives the performance counter values, compares the performance counter values with the respective threshold values and generates at least one comparison signal in response to results of the comparisons. An interference indication generator receives the at least one comparison signal and generates at least one interference indication in response to the at least one received comparison signal.

    摘要翻译: 本申请涉及一种用于检测软件干扰的装置及其操作方法。 处理器和至少一个共享资源形成计算外壳以在时间共享操作中执行第一功能安全关键应用和至少一个第二应用。 提供一个或多个性能计数器以响应于性能相关事件来调整计数器值。 参考值存储存储一个或多个阈值,每个阈值与性能计数器之一相关联。 比较器接收性能计数器值,将性能计数器值与相应的阈值进行比较,并响应于比较结果生成至少一个比较信号。 干扰指示发生器接收所述至少一个比较信号,并响应于所述至少一个接收到的比较信号而生成至少一个干扰指示。

    Coding device, decoding device, method for coding, and method for decoding
    5.
    发明授权
    Coding device, decoding device, method for coding, and method for decoding 有权
    编码装置,解码装置,编码方法和解码方法

    公开(公告)号:US06756920B2

    公开(公告)日:2004-06-29

    申请号:US10194901

    申请日:2002-07-12

    IPC分类号: H03M700

    CPC分类号: H04L25/49 G06F13/387

    摘要: A coding device is able to convert the data that is to be coded to data having different characteristics. The decoding device is able to decode differently coded data. The coding device utilizes measures to code the data according to various characteristics and protocols. Often the characteristics can be defined by state distributions. The decoding device can utilize information contained in the data to be decoded to characterize the data and define measures for decoding the data. Coding devices and decoding devices such as these can be used for widely differing applications.

    摘要翻译: 编码装置能够将要编码的数据转换成具有不同特征的数据。 解码装置能够对不同编码的数据进行解码。 编码装置利用根据各种特性和协议对数据进行编码的措施。 通常状态分布可以定义特征。 解码装置可以利用包含在要解码的数据中的信息来表征数据并定义用于解码数据的措施。 诸如这些的编码设备和解码设备可以用于广泛不同的应用。

    Memory device method for operating a system containing a memory device for fault detection with two interrupt service routines
    6.
    发明授权
    Memory device method for operating a system containing a memory device for fault detection with two interrupt service routines 有权
    用于使用两个中断服务程序操作包含用于故障检测的存储器件的系统的存储器件方法

    公开(公告)号:US06986079B2

    公开(公告)日:2006-01-10

    申请号:US10199641

    申请日:2002-07-19

    IPC分类号: G06F11/00

    CPC分类号: G06F11/073 G06F11/0793

    摘要: A method operates a system with a program-controlled unit. The program-controlled unit reads and executes data that are stored in a memory device and that represents instructions. According to the method, a check is made during the reading of data from the memory device to determine whether the relevant data are error-free. When it is ascertained that the relevant data are not error-free, the execution of an interrupt service routine is initiated. The method is distinguished by the fact that, when it is ascertained, during the execution of the interrupt service routine, that the data that are to be read from the memory device for this purpose is not error-free, the execution of the interrupt service routine is interrupted or ended, and the execution of an interrupt service routine stored at a different location is initiated. The memory device described has an error detection device that outputs an interrupt request signal if the stored data are erroneous, and that outputs a different interrupt request signal if it again discovers an error during the execution of the interrupt service routine.

    摘要翻译: 一种方法操作具有程序控制单元的系统。 程序控制单元读取并执行存储在存储器件中并表示指令的数据。 根据该方法,在从存储器件读取数据期间进行检查,以确定相关数据是否是无错误的。 当确定相关数据不是无错误时,启动中断服务程序的执行。 该方法的特征在于,当确定在执行中断服务程序期间,为了这个目的从存储器件读取的数据不是无错误的,执行中断服务 程序中断或结束,并且启动存储在不同位置的中断服务程序的执行。 所描述的存储器件具有错误检测装置,如果存储的数据是错误的,则输出中断请求信号,并且如果在执行中断服务程序期间再次发现错误则输出不同的中断请求信号。

    Method and device for monitoring the pressure in a tire
    7.
    发明授权
    Method and device for monitoring the pressure in a tire 有权
    用于监测轮胎压力的方法和装置

    公开(公告)号:US06959595B2

    公开(公告)日:2005-11-01

    申请号:US10436431

    申请日:2003-05-12

    IPC分类号: B60C23/04 B60C23/02

    CPC分类号: B60C23/0408

    摘要: A tire pressure monitor and a method of measuring a pressure in a tire include a decision whether the tire pressure should be measured. The decision is made in dependence on a magnitude of a change in a signal which is output by a sensor which senses the pressure prevailing in the tire or the temperature prevailing in the tire. As a result it is possible to reduce the size and the weight of the components of a tire pressure monitor to be accommodated in the tire or in the rim to a minimum.

    摘要翻译: 轮胎压力监视器和测量轮胎中的压力的​​方法包括是否应该测量轮胎压力的决定。 该决定取决于由感测轮胎中的压力或轮胎中存在的温度的传感器输出的信号变化的大小。 结果,可以将要容纳在轮胎或轮辋中的轮胎压力监视器的部件的尺寸和重量减小到最小。

    CACHE-COHERENT MULTIPROCESSOR SYSTEM AND A METHOD FOR DETECTING FAILURES IN A CACHE-COHERENT MULTIPROCESSOR SYSTEM
    9.
    发明申请
    CACHE-COHERENT MULTIPROCESSOR SYSTEM AND A METHOD FOR DETECTING FAILURES IN A CACHE-COHERENT MULTIPROCESSOR SYSTEM 审中-公开
    高速缓存多媒体处理系统和一种用于检测高速缓存多媒体系统中的故障的方法

    公开(公告)号:US20160034398A1

    公开(公告)日:2016-02-04

    申请号:US14445237

    申请日:2014-07-29

    IPC分类号: G06F12/08

    摘要: A cache-coherent multiprocessor system comprising processing units, a shared memory resource accessible by the processing units, the shared memory resource being divided into at least one shared region, at least one first region, and at least one second region, a first cache, a second cache, a coherency unit, and a monitor unit, wherein the monitor unit is adapted to generate an error signal, when the coherency unit affects the at least one first region due to a memory access from the second processing unit and/or when the coherency unit affects the at least one second region due to a memory access from the first processing unit, and a method for detecting failures in a such a cache-coherent multiprocessor system.

    摘要翻译: 一种高速缓存一致的多处理器系统,包括处理单元,由处理单元可访问的共享存储器资源,共享存储器资源被划分为至少一个共享区域,至少一个第一区域和至少一个第二区域,第一高速缓存, 第二高速缓存,一致性单元和监视器单元,其中当所述一致性单元由于来自所述第二处理单元的存储器访问而影响所述至少一个第一区域时和/或何时所述监视单元适于产生错误信号 相关性单元由于来自第一处理单元的存储器访问而影响至少一个第二区域,以及用于检测这种高速缓存相关多处理器系统中的故障的方法。

    Method and device for digitally coding binary data with a particular transmit signal spectrum
    10.
    发明授权
    Method and device for digitally coding binary data with a particular transmit signal spectrum 有权
    用特定发射信号频谱对二进制数据进行数字编码的方法和装置

    公开(公告)号:US06509849B2

    公开(公告)日:2003-01-21

    申请号:US09899665

    申请日:2001-07-05

    IPC分类号: H03M500

    CPC分类号: H04L25/49

    摘要: A coding device for coding binary data with a particular transmit signal spectrum, the coding device having a data stream separating device for separating a data stream, which consists of the binary data to be coded, into data blocks having a predetermined data block length, a calculating device for calculating the difference between the number of binary data having a second binary state, for each data block, and a transmitting device for transmitting each data block as transformed data block or as non-transformed data block via a communication channel connected to the transmitting device, in such a manner that the total sequence of the data blocks transmitted by the transmitting device on the communication channel exhibits the particular transmit signal spectrum.

    摘要翻译: 一种编码装置,用于对具有特定发射信号频谱的二进制数据进行编码,该编码装置具有数据流分离装置,用于将由待编码的二进制数据组成的数据流分离成具有预定数据块长度的数据块, 计算装置,用于计算针对每个数据块的具有第二二进制状态的二进制数据的数量与用于将每个数据块作为变换数据块发送的发送装置或经由连接到所述数据块的通信信道的非变换数据块 发送装置,使得由通信信道上的发送装置发送的数据块的总序列表现出特定的发送信号频谱。