公开(公告)号：US20160315165A1

公开(公告)日：2016-10-27

申请号：US14955205

申请日：2015-12-01

申请人： Dong-soo LEE ,  Hu-yong LEE ,  Won-keun CHUNG ,  Hoon-joo NA ,  Taek-soo JEON ,  Sang-jin HYUN

发明人： Dong-soo LEE ,  Hu-yong LEE ,  Won-keun CHUNG ,  Hoon-joo NA ,  Taek-soo JEON ,  Sang-jin HYUN

IPC分类号： H01L29/51 ,  H01L29/78 ,  H01L27/092

CPC分类号： H01L29/512 ,  B82Y10/00 ,  H01L21/28185 ,  H01L21/823456 ,  H01L21/823842 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/785

摘要： An integrated circuit device includes a substrate including an active region, an interfacial layer including a lower insulating layer on the active region, the lower insulating layer doped with a chalcogen element having an atomic weight equal to or greater than 16, a gate insulation layer on the interfacial layer, and a gate electrode on the gate insulation layer.

摘要翻译： 一种集成电路器件包括：衬底，其包括有源区，界面层包括有源区上的下绝缘层，所述下绝缘层掺杂有原子量等于或大于16的硫属元素;栅绝缘层， 界面层和栅极绝缘层上的栅电极。

公开(公告)号：US09786761B2

公开(公告)日：2017-10-10

申请号：US14955205

申请日：2015-12-01

申请人： Dong-soo Lee ,  Hu-yong Lee ,  Won-keun Chung ,  Hoon-joo Na ,  Taek-soo Jeon ,  Sang-jin Hyun

发明人： Dong-soo Lee ,  Hu-yong Lee ,  Won-keun Chung ,  Hoon-joo Na ,  Taek-soo Jeon ,  Sang-jin Hyun

IPC分类号： B82Y10/00 ,  H01L29/51 ,  H01L27/092 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/06

CPC分类号： H01L29/512 ,  B82Y10/00 ,  H01L21/28185 ,  H01L21/823456 ,  H01L21/823842 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/785

摘要： An integrated circuit device includes a substrate including an active region, an interfacial layer including a lower insulating layer on the active region, the lower insulating layer doped with a chalcogen element having an atomic weight equal to or greater than 16, a gate insulation layer on the interfacial layer, and a gate electrode on the gate insulation layer.