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    Three-Phase Single-Stage Soft-Switching AC-DC Converter with Power Factor Correction
    1.
    发明申请
    Three-Phase Single-Stage Soft-Switching AC-DC Converter with Power Factor Correction 审中-公开

    公开(公告)号：US20200235656A1

    公开(公告)日：2020-07-23

    申请号：US16744166

    申请日：2020-01-15

    申请人： Yan-Fei LIU

    发明人： Mojtaba Forouzesh ,  Xiang Zhou ,  Yan-Fei LIU

    IPC分类号： H02M1/42 ,  H02M1/08 ,  H02J7/02 ,  H02M3/335 ,  H02M1/00 ,  B60L53/00

    摘要： Three-phase single-stage AC-DC converters achieve power factor correction with low phase voltage switch stress. Direct input current sensing is performed to calculate the average input current of the AC-DC converter and implement power factor correction. Embodiments feature high power factor, single stage power conversion, and soft-switching of all switches, resulting in high conversion efficiency in a cost-effective single-stage three-phase structure. The converters have low output voltage ripple without a double line frequency component, which allows non-electrolytic capacitor implementation. The converters are particularly useful in high-power applications such as electric vehicle charging.

    Gate Drivers and Voltage Regulators for Gallium Nitride Devices and Integrated Circuits
    3.
    发明申请
    Gate Drivers and Voltage Regulators for Gallium Nitride Devices and Integrated Circuits 审中-公开

    公开(公告)号：US20200007119A1

    公开(公告)日：2020-01-02

    申请号：US16454078

    申请日：2019-06-27

    申请人： Zhanming Li ,  Yue Fu ,  Yan-Fei Liu

    发明人： Zhanming Li ,  Yue Fu ,  Yan-Fei Liu

    IPC分类号： H03K17/06 ,  H01L29/20 ,  H01L29/778 ,  H01L27/06 ,  H03K17/081 ,  H01L27/02 ,  H02M3/335 ,  H02M1/08

    摘要： Voltage stabilizing and voltage regulating circuits implemented in GaN HEMT technology provide stable output voltages suitable for use in applications such as GaN power transistor gate drivers and low voltage auxiliary power supplies for GaN integrated circuits. Gate driver and voltage regulator modules include at least one GaN D-mode HEMT (DHEMT) and at least two GaN E-mode HEMTs (EHEMTs) connected together in series, so that the at least one DHEMT operates as a variable resistor and the at least two EHEMTs operate as a Zener diode that limits the output voltage. The gate driver and voltage regulator modules may be implemented as a GaN integrated circuits, and may be monolithically integrated together with other components such as amplifiers and power HEMTs on a single die to provide a GaN HEMT power module IC.

    Single-phase four-level inverter circuit topology and three-phase four-level inverter circuit topology
    4.
    发明授权
    Single-phase four-level inverter circuit topology and three-phase four-level inverter circuit topology 有权

    公开(公告)号：US10389271B2

    公开(公告)日：2019-08-20

    申请号：US15768552

    申请日：2016-11-07

    申请人： Hongliang Wang ,  Yan-Fei Liu

    发明人： Hongliang Wang ,  Yan-Fei Liu

    IPC分类号： H02M7/483 ,  H02M7/487

    摘要： A single-phase four-level inverter circuit topology and a three-phase four-level inverter circuit topology. The single-phase four-level inverter circuit topology is adapted to be used with two series-connected direct current power sources, so as to enable a first direct current power source or a second direct current power source to supply power to a load of the four-level inverter circuit topology, alternatively, any one of two direct current power sources is first algebraically superimposed with a flying capacitor and then supplies the power to the load of the four-level inverter circuit topology (M), thereby making the four-level inverter circuit topology output four different levels. The single-phase and three-phase four-level inverter circuit topologies reduce the system cost and volume by using a flying capacitor, the voltage utilization rate is three times that of the existing four-level inverter circuit topology under the same operating conditions, and the direct current side neutral point voltage can be balanced without requiring additional circuits.

    Five-level half bridge inverter topology with high voltage utilization ratio
    5.
    发明授权
    Five-level half bridge inverter topology with high voltage utilization ratio 有权

    公开(公告)号：US10312825B2

    公开(公告)日：2019-06-04

    申请号：US15751329

    申请日：2016-08-15

    申请人： Hongliang Wang ,  Yan-Fei Liu

    发明人： Hongliang Wang ,  Yan-Fei Liu

    IPC分类号： H02M7/5387 ,  H02M7/487 ,  H02M7/483 ,  H02S40/32

    摘要： A single phase five-level inverter topology comprising a half-bridge inverter circuit with a floating capacitor which outputs five mutually different voltage levels including zero, wherein both the system cost and the size is reduced, the leakage current is eliminated substantially and high efficiency is achieved by using five-level half-bridge structure with only one AC filtering inductor. A three-phase five-level inverter topology wherein the voltage utilization is twice that of the present three-phase five-level half-bridge inverter under the same operating conditions; the AC filtering inductance is smaller than that of the three-level half-bridge inverter; the DC link mid-point voltage can be balanced without additional circuitry.

    Five-level inverter topology with high voltage utilization ratio
    6.
    发明授权
    Five-level inverter topology with high voltage utilization ratio 有权

    公开(公告)号：US10250159B2

    公开(公告)日：2019-04-02

    申请号：US15767721

    申请日：2016-11-07

    申请人： Hongliang Wang ,  Yan-Fei Liu

    发明人： Hongliang Wang ,  Yan-Fei Liu

    IPC分类号： H02M7/483 ,  H02M1/32 ,  H02M7/5387 ,  H02M7/487

    摘要： A five-voltage level inverter topology circuit and a three-phase five-voltage level inverter topology circuit, suitable for use with two series-connected direct current (DC) power sources, include a half-bridge inverter circuit having a first circuit module and a second circuit module. The half-bridge inverter circuit outputs five voltage levels including a 0V level. The five-voltage level inverter topology circuit has a five-voltage level half-bridge structure, and only requires an alternating current (AC) filtering inductor, thereby reducing system cost and size, removing leakage current, and providing high efficiency.

    Five-Level Half Bridge Inverter Topology with High Voltage Utilization Ratio
    8.
    发明申请
    Five-Level Half Bridge Inverter Topology with High Voltage Utilization Ratio 审中-公开

    公开(公告)号：US20180241320A1

    公开(公告)日：2018-08-23

    申请号：US15751329

    申请日：2016-08-15

    申请人： Hongliang Wang ,  Yan-Fei Liu

    发明人： Hongliang Wang ,  Yan-Fei Liu

    IPC分类号： H02M7/483 ,  H02M7/5387 ,  H02S40/32

    CPC分类号： H02M7/483 ,  H02M7/487 ,  H02M7/5387 ,  H02S40/32

    摘要： Disclosed is single phase five-level inverter topology comprising a half-bridge inverter circuit with a floating capacitor which outputs five mutually different voltage levels including zero, wherein both the system cost and the size is reduced, the leakage current is eliminated substantially and high efficiency is achieved by using five-level half-bridge structure with only one AC filtering inductor. Provided also is three-phase five-level inverter topology wherein the voltage utilization is twice that of the present three-phase five-level half-bridge inverter under the same operating conditions; the AC filtering inductance is smaller than that of the three-level half-bridge inverter; the DC link mid-point voltage can be balanced without additional circuitry.

    Hybrid Modulation Strategy for Multilevel Inverters
    9.
    发明申请
    Hybrid Modulation Strategy for Multilevel Inverters 审中-公开

    公开(公告)号：US20180062537A1

    公开(公告)日：2018-03-01

    申请号：US15662044

    申请日：2017-07-27

    申请人： Hongliang Wang ,  Yan-Fei Liu

    发明人： Hongliang Wang ,  Yan-Fei Liu

    IPC分类号： H02M7/487 ,  H02M1/08

    CPC分类号： H02M7/487 ,  H02J3/383 ,  H02M1/08 ,  H02M7/217 ,  H02M7/219 ,  H02M7/483 ,  H02M7/5387

    摘要： Hybrid modulation strategies are provided for single phase and three phase inverter topologies. According to hybrid modulation strategy embodiments, one line frequency period is divided into two operation modes based on the polarities of output voltage and output current. When polarities of the output voltage and output current are the same, a nominal voltage level modulation is used to generate the output voltage. When polarities of the output voltage and output current are opposite, a lower voltage level modulation is used to generate the output voltage. In one embodiment, a nominal voltage level modulation is five voltage level modulation, and a lower voltage level modulation is three or two voltage level modulation. Embodiments allow inverters to be constructed with fewer switches, and improve performance of multilevel inverters. The hybrid modulation strategies may be implemented in multilevel inverters such as active neutral point clamped (ANPC) and neutral point clamped (NPC) inverters.