摘要:
Disclosed are an addition circuit that makes it possible to add two vector signals in a high-frequency region, a power amplifier circuit using the same, and a transmission device and communication device using the power amplifier circuit. Disclosed is an addition circuit, wherein first through fourth multipliers (11-14) multiply first and second high-frequency input signals (Si1, Si2) and first and second reference signals (Ref1, Ref2) and output first through fourth direct current output signals (Sd1-Sd4), first and second adders (21, 22) add in-phase signals of these to one another and output fifth and sixth direct current output signals (Sd5, Sd6), fifth and sixth multipliers (15, 16) multiply these and the first and second reference signals (Ref1, Ref2) and output first and second high-frequency output signals (So1, So2), which are then combined, whereby a third high-frequency output signal (So3), in which the first and second high-frequency input signals (Si1, Si2) have been vector added, is output from an output terminal (44). The addition circuit can be used in a high-frequency region.
摘要:
Disclosed are an addition circuit that makes it possible to add two vector signals in a high-frequency region, a power amplifier circuit using the same, and a transmission device and communication device using the power amplifier circuit. Disclosed is an addition circuit, wherein first through fourth multipliers (11-14) multiply first and second high-frequency input signals (Si1, Si2) and first and second reference signals (Ref1, Ref2) and output first through fourth direct current output signals (Sd1-Sd4), first and second adders (21, 22) add in-phase signals of these to one another and output fifth and sixth direct current output signals (Sd5, Sd6), fifth and sixth multipliers (15, 16) multiply these and the first and second reference signals (Ref1, Ref2) and output first and second high-frequency output signals (So1, So2), which are then combined, whereby a third high-frequency output signal (So3), in which the first and second high-frequency input signals (Si1, Si2) have been vector added, is output from an output terminal (44). The addition circuit can be used in a high-frequency region.
摘要:
To provide a power amplification device that can amplify an input signal having an envelope variation with high power-added efficiency in a wide frequency range, and a transmission device and a communication device using the power amplification device. A first orthogonal signal (Sd1) is generated by performing vector subtraction between first and second fundamental signals (Su1 and Su2) having the same amplitude and a phase difference δθ (0 degrees
摘要:
To provide a power amplification device that can amplify an input signal having an envelope variation with high power-added efficiency in a wide frequency range, and a transmission device and a communication device using the power amplification device. A first orthogonal signal (Sd1) is generated by performing vector subtraction between first and second fundamental signals (Su1 and Su2) having the same amplitude and a phase difference Υθ (0 degrees
摘要:
To provide a power amplification device having a function of preventing deviation of the amplitude and phase of an output signal having amplified envelope variation from a predetermined value, and a transmission device and a communication device both using the same. A power amplification device comprises a variable phase shifter circuit (10) for shifting a phase of an input signal; first and second adder circuits (11a), (11b) for generating first and second constant envelope signals, respectively; first and second amplifier circuits (12a), (12b); first and second amplitude detection circuits (13a), (13b) for detecting amplitudes; a first amplitude control circuit (20) for changing the amplitudes of the first and second constant envelope vector generating signals; an output adder circuit (14) for vector-adding the first and second amplified signals to generate an output signal; a shift amount control circuit (30) for controlling a shift amount of the variable phase shifter circuit; a gain control circuit (40) for controlling the gains of the first and second adder circuits; and a second amplitude control circuit (50) for changing the amplitudes of the first and second constant envelope vector generating signals.
摘要:
Provided are a transfer gate circuit that has reduced disturbance in an output waveform thereof, a power combining circuit using the transfer gate circuit, and a transmission device and a communication device that use the power combining circuit. The transfer gate circuit includes: output terminals (3, 4); a transistor (5) including a drain connected to the output terminal (3); a transistor (6) including a drain connected to the output terminal (4); transistors (7, 8) each including a drain connected to the output terminal (3) and each including a source connected to a ground potential; and transistors (9, 10) each including a drain connected to the output terminal (4) and each including a source connected to the ground potential. In the transfer gate circuit, the transistors (5, 6) include sources to which first and second input signals are input, respectively, the transistor (5) includes agate to which a signal in phase with the second input signal is input, the transistor (6) includes a gate to which a signal in phase with the first input signal is input, the transistors (7, 9) each include a gate to which a signal in antiphase to the second input signal is input, and the transistors (8, 10) each include a gate to which a signal in antiphase to the first input signal is input.
摘要:
To provide a power amplification device having a function of preventing deviation of the amplitude and phase of an output signal having amplified envelope variation from a predetermined value, and a transmission device and a communication device both using the same. A power amplification device comprises a variable phase shifter circuit (10) for shifting a phase of an input signal; first and second adder circuits (11a), (11b) for generating first and second constant envelope signals, respectively; first and second amplifier circuits (12a), (12b); first and second amplitude detection circuits (13a), (13b) for detecting amplitudes; a first amplitude control circuit (20) for changing the amplitudes of the first and second constant envelope vector generating signals; an output adder circuit (14) for vector-adding the first and second amplified signals to generate an output signal; a shift amount control circuit (30) for controlling a shift amount of the variable phase shifter circuit; a gain control circuit (40) for controlling the gains of the first and second adder circuits; and a second amplitude control circuit (50) for changing the amplitudes of the first and second constant envelope vector generating signals.
摘要:
Provided are an amplification circuit capable of amplifying an input signal having a changing duty ratio with high efficiency, and a transmission device and a communication device using the amplification circuit. The amplification circuit includes: a transistor circuit (10) having a pulse wave first signal having a changing duty ratio input, and a second signal obtained by amplifying the pulse wave first signal output; and a matching circuit (20) having the second signal input and a third signal having a fundamental frequency of the pulse wave first signal output. An impedance of the matching circuit (20) as seen from the transistor circuit side changes in accordance with the duty ratio of the pulse wave first signal. The transmission device and the communication device each use the amplification circuit.
摘要:
To provide an adder capable of obtaining an addition signal of a plurality of high frequency signals, and also a power combiner, a quadrature modulator, a quadrature demodulator, a power amplifier, a transmitter, and a wireless communicator, each of which uses the adder. Impedances (Zg, Zh) seen from a common output point (P3) of a plurality of first impedance circuits (110a, 110b) toward respective input terminals (102a, 102b) are set so that high frequency currents (Ig, Ih) are approximately zero. An impedance (Zs) seen from a first connection point (P1) toward the input terminals (102a, 102b) is set so that a high frequency current (Is) is approximately zero. An impedance (Zc) seen from the first connection point (P1) toward a circuit (150) is set so that a high frequency current (Ic) is approximately zero. An impedance (Zm) seen from a second connection point (P2) toward a power supply is set so that a high frequency current (Im) is approximately zero.
摘要:
To provide an adder capable of obtaining an addition signal of a plurality of high frequency signals, and also a power combiner, a quadrature modulator, a quadrature demodulator, a power amplifier, a transmitter, and a wireless communicator, each of which uses the adder. Impedances (Zg, Zh) seen from a common output point (P3) of a plurality of first impedance circuits (110a, 110b) toward respective input terminals (102a, 102b) are set so that high frequency currents (Ig, Ih) are approximately zero. An impedance (Zs) seen from a first connection point (P1) toward the input terminals (102a, 102b) is set so that a high frequency current (Is) is approximately zero. An impedance (Zc) seen from the first connection point (P1) toward a circuit (150) is set so that a high frequency current (Ic) is approximately zero. An impedance (Zm) seen from a second connection point (P2) toward a power supply is set so that a high frequency current (Im) is approximately zero.