公开(公告)号：US20100207202A1

公开(公告)日：2010-08-19

申请号：US12706501

申请日：2010-02-16

申请人： Yasuhiko UEDA

发明人： Yasuhiko UEDA

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7827 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/66666

摘要： A semiconductor device includes a semiconductor substrate, a first insulating film, a second insulating film, and a conductive layer. The semiconductor substrate includes a pillar portion extending from a main surface of the semiconductor substrate. The first insulating film covers a side surface of the pillar portion. The second insulating film covers the main surface of the semiconductor substrate. The second insulating film is thicker than the first insulating film. The conductive layer extends along the first insulating film.

摘要翻译： 半导体器件包括半导体衬底，第一绝缘膜，第二绝缘膜和导电层。 半导体衬底包括从半导体衬底的主表面延伸的柱部分。 第一绝缘膜覆盖柱部的侧面。 第二绝缘膜覆盖半导体基板的主表面。 第二绝缘膜比第一绝缘膜厚。 导电层沿着第一绝缘膜延伸。

公开(公告)号：US20080303086A1

公开(公告)日：2008-12-11

申请号：US12155530

申请日：2008-06-05

申请人： Yasuhiko Ueda ,  Hiroyuki Fujimoto

发明人： Yasuhiko Ueda ,  Hiroyuki Fujimoto

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66621 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/10876 ,  H01L29/4236

摘要： A semiconductor apparatus including a trench gate transistor having at least an active region surrounded by a device isolation insulating film; a trench provided by bringing both ends thereof into contact with the device isolation insulating film in the active region; a gate electrode formed in the trench via a gate insulating film; and a diffusion layer formed close to the trench; on a semiconductor substrate, and also includes an opening portion positioned on one surface of the semiconductor substrate; a pair of first inner walls positioned in a side of the device isolation insulating film and connected with the opening portion; a pair of second inner walls positioned in a side of the active region and connected with the opening portion; and a bottom portion positioned opposite to the opening portion and connected with the first inner walls and the second inner walls, wherein a cross sectional outline of the second inner wall is substantially linear, and a burr generated inside the trench is removed or reduced.

摘要翻译： 一种半导体装置，包括具有由器件隔离绝缘膜包围的至少一个有源区的沟槽栅极晶体管; 通过使其两端与有源区域中的器件隔离绝缘膜接触而提供的沟槽; 通过栅极绝缘膜形成在所述沟槽中的栅电极; 以及在沟槽附近形成的扩散层; 并且还包括位于半导体衬底的一个表面上的开口部分; 位于所述器件隔离绝缘膜侧并与所述开口部连接的一对第一内壁; 一对第二内壁，其位于所述有源区域的一侧并与所述开口部分连接; 以及与所述开口部相对设置并与所述第一内壁和所述第二内壁连接的底部，其中所述第二内壁的横截面轮廓基本上是线性的，并且在所述沟槽内产生的毛刺被去除或减少。

公开(公告)号：US20070111373A1

公开(公告)日：2007-05-17

申请号：US11594746

申请日：2006-11-09

申请人： Yasuhiko Ueda

发明人： Yasuhiko Ueda

IPC分类号： H01L21/00

CPC分类号： H01L21/0332 ,  H01L21/31144

摘要： Recently, with shortened wavelengths employed in aligners, it is now difficult to use a material containing a benzene ring as a photoresist material. Since resist has extremely low plasma resistance, formation of deep holes using a photoresist as a dry etching mask is difficult. Under such circumstances, in the present invention, amorphous carbon film 6 is formed on photoresist 4 in which first hole 5 is formed, and using amorphous carbon film 6 as a mask, deep second hole 7 is formed in a etch target material such as underlying SiO2 film 2.

摘要翻译： 近来，随着对准器中使用的波长缩短，现在难以使用含有苯环作为光致抗蚀剂材料的材料。 由于抗蚀剂具有极低的等离子体电阻，因此难以使用光致抗蚀剂形成深孔作为干蚀刻掩模。 在这种情况下，在本发明中，在形成有第一孔5的光致抗蚀剂4上形成无定形碳膜6，使用非晶质碳膜6作为掩模，在蚀刻靶材料中形成深的第二孔7，例如底层 SiO 2膜2。

公开(公告)号：US20070075433A1

公开(公告)日：2007-04-05

申请号：US11518278

申请日：2006-09-11

申请人： Yasuhiko Ueda

发明人： Yasuhiko Ueda

IPC分类号： H01L23/48

CPC分类号： H01L27/0207 ,  H01L27/10855

摘要： A semiconductor device includes a substrate on which a plurality of contact holes, a plane shape of each of which is a oval, are formed and contacts formed in each of the contact holes and having oval-shaped profiles that correspond to each of the holes. The position on the perimeter of each oval at which the separation width with an oval that is adjacent to that oval is a minimum is separated by a prescribed spacing from the intersection of the perimeter of that oval and the minor axis of that oval.

摘要翻译： 半导体器件包括：基板，其上形成有多个接触孔，每个接触孔均为椭圆形，并且形成在每个接触孔中并具有与每个孔相对应的椭圆形轮廓的触点。 每个椭圆的周长上的与椭圆相邻的椭圆的分离宽度最小的位置的位置与该椭圆的周长和该椭圆的短轴的交点相隔规定的间隔。

公开(公告)号：US06559486B2

公开(公告)日：2003-05-06

申请号：US09725873

申请日：2000-11-30

申请人： Yasuhiko Ueda

发明人： Yasuhiko Ueda

IPC分类号： H01L2974

CPC分类号： H01L21/76805 ,  H01L21/76802 ,  H01L21/76816 ,  H01L23/5223

摘要： An etching mask having high etching selectivity for an inorganic interlayer film of SiO2 or Si3N4, an organic interlayer film such as ARC and an electrically conductive film and a contact hole using such an etching mask, a process for forming same and a resultant semiconductor device. On formation of contact holes for connecting wirings disposed through interlayer films of inorganic or organic material (20, 23 in FIG. 2), a thin film of silicon carbide (21 in FIG. 2) having high etching selectivity for any of the inorganic and organic materials is deposited on an interlayer film, and a mask pattern of silicon carbide is formed using a resist pattern (22 in FIG. 2). Thereafter, high aspect ratio contact holes having a size which is exactly same as that of the mask is formed by etching the interlayer film using the silicon carbide mask.

公开(公告)号：US5810932A

公开(公告)日：1998-09-22

申请号：US692283

申请日：1996-08-05

申请人： Yasuhiko Ueda ,  Hideaki Kawamoto ,  Hidenobu Miyamoto

发明人： Yasuhiko Ueda ,  Hideaki Kawamoto ,  Hidenobu Miyamoto

IPC分类号： H01J37/32 ,  H05H1/46 ,  H05H1/00 ,  C23F1/02

CPC分类号： H01J37/32082 ,  H01J37/3266 ,  H05H1/46

摘要： An apparatus for generating plasma, includes a cylindrical vacuum chamber made of dielectric substance, the chamber being open only at a bottom thereof and having a height of 50 mm or smaller, at least one antenna coil disposed around the chamber for receiving high frequency power therein, and at least one electromagnetic coil disposed around the antenna coil. The cylindrical vacuum chamber may be replaced with a plate made of a dielectric substance. The apparatus is operative to carry out photoresist using etching without leaving any residue under a high selection ratio to the photoresist. In addition, the etching product does not tend to adhere to the vacuum chamber, and it would be easy to remove etching product from the vacuum chamber, even if the product adheres to the vacuum chamber.

摘要翻译： 一种用于产生等离子体的装置，包括由电介质材料制成的圆柱形真空室，该室仅在其底部开口并具有50mm或更小的高度，至少一个设置在室周围的用于在其中接收高频功率的天线线圈 以及设置在天线线圈周围的至少一个电磁线圈。 圆柱形真空室可以用由电介质材料制成的板代替。 该设备可操作以使用蚀刻来执行光致抗蚀剂，而不会使光致抗蚀剂具有高选择比的任何残留物。 此外，即使产品粘附到真空室，蚀刻产品也不会粘附到真空室，并且容易将真空室中的蚀刻产物除去。

公开(公告)号：US08637364B2

公开(公告)日：2014-01-28

申请号：US13455166

申请日：2012-04-25

申请人： Yasuhiko Ueda

发明人： Yasuhiko Ueda

IPC分类号： H01L21/8242

CPC分类号： H01L27/10894 ,  H01L21/31116 ,  H01L21/31122 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/91

摘要： An amorphous carbon film and an interlayer insulation film are formed in a memory cell region and a peripheral circuit region, respectively. An insulating film is formed on the amorphous carbon film and the interlayer insulation film. A portion of the insulating film that corresponds to capacitors on the amorphous carbon film is removed so that lower electrodes of the capacitors are supported from opposite sides of the lower electrodes. An insulating film pattern continuously extends from the memory cell region to the peripheral circuit region wholly covered with the insulating film pattern. Subsequently, the amorphous carbon film is removed to leave the capacitors supported by the insulating film pattern on both sides of the lower electrodes.

摘要翻译： 分别在存储单元区域和外围电路区域中形成非晶碳膜和层间绝缘膜。 在非晶碳膜和层间绝缘膜上形成绝缘膜。 除去对应于非晶碳膜上的电容器的绝缘膜的一部分，使得电容器的下电极从下电极的相对侧支撑。 绝缘膜图案从存储单元区域连续地延伸到完全被绝缘膜图案覆盖的外围电路区域。 随后，去除非晶碳膜，留下由下电极两侧由绝缘膜图案支撑的电容器。

公开(公告)号：US08513809B2

公开(公告)日：2013-08-20

申请号：US13102521

申请日：2011-05-06

申请人： Yasuhiko Ueda

发明人： Yasuhiko Ueda

IPC分类号： H01L23/52

CPC分类号： H01L27/10885 ,  H01L21/764 ,  H01L21/76801 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes an interlayer insulation film, a wiring embedded in the interlayer insulation film and an air gap part formed between a side surface of the wiring and the interlayer insulation film. A first sidewall film is formed in the air gap part so that the first sidewall film contacts with the side surface of the wiring.

摘要翻译： 半导体器件包括层间绝缘膜，嵌入在层间绝缘膜中的布线和形成在布线的侧表面和层间绝缘膜之间的气隙部分。 第一侧壁膜形成在气隙部分中，使得第一侧壁膜与布线的侧表面接触。

公开(公告)号：US20080227225A1

公开(公告)日：2008-09-18

申请号：US12073177

申请日：2008-02-29

申请人： Yasuhiko Ueda

发明人： Yasuhiko Ueda

IPC分类号： H01L21/66 ,  H01L21/306 ,  C23F1/00

CPC分类号： H01J37/32935 ,  H01J37/32972 ,  H01L22/20

摘要： The present invention relates to a method of manufacturing a semiconductor device wherein etching is performed on films on a wafer using a plasma treatment apparatus. In the manufacturing method according to the present invention, a change in the difference between the emission intensities of a first wavelength component and a second wavelength component in plasma is monitored during etching. If the amount of change in the difference per unit time exceeds a predetermined threshold a given number of times in a row, then the flow rate of oxygen introduced to the plasma treatment apparatus is increased or, if the amount of change exceeding the predetermined threshold has not been seen, then the oxygen flow rate is set back to the original value thereof. This series of actions is repeated all the time during a set period of time.

摘要翻译： 本发明涉及一种制造半导体器件的方法，其中使用等离子体处理装置对晶片上的膜进行蚀刻。 在根据本发明的制造方法中，在蚀刻期间监测等离子体中第一波长分量和第二波长分量的发射强度之间的差异的变化。 如果每单位时间的差异的变化量连续地超过规定的阈值一定次数，则引入等离子体处理装置的氧气的流量增加，或者如果超过预定阈值的变化量具有 没有看到，则氧气流量被恢复到其原始值。 这一系列的动作在一段时间内一直重复。

公开(公告)号：US20070224763A1

公开(公告)日：2007-09-27

申请号：US11717707

申请日：2007-03-14

申请人： Hiroyuki Fujimoto ,  Yasuhiko Ueda ,  Fumiki Aiso ,  Yuki Koga

发明人： Hiroyuki Fujimoto ,  Yasuhiko Ueda ,  Fumiki Aiso ,  Yuki Koga

IPC分类号： H01L21/336

CPC分类号： H01L21/3247 ,  H01L29/4236 ,  H01L29/66621

摘要： In a method of manufacturing a semiconductor device, a trench is formed to have an upper quadrangular section and a lower circular section which is formed through a hydrogen annealing process, to extend in a depth direction of a semiconductor substrate. An insulating film is formed on a surface of the trench and a surface of the semiconductor substrate. A conductive film is formed to fill the trench whose surface is covered with the an insulating film. Source/drain regions are formed on both sides of the trench.

摘要翻译： 在制造半导体器件的方法中，沟槽形成为具有通过氢退火工艺形成的上部四边形部分和下部圆形部分，以在半导体衬底的深度方向上延伸。 在沟槽的表面和半导体衬底的表面上形成绝缘膜。 形成导电膜以填充其表面被绝缘膜覆盖的沟槽。 源极/漏极区域形成在沟槽的两侧。