公开(公告)号：US20130323893A1

公开(公告)日：2013-12-05

申请号：US13486240

申请日：2012-06-01

Applicant: Harry-Hak-Lay Chuang ,  Sin-Hua Wu ,  Chung-Hau Fei ,  Ming Zhu ,  Bao-Ru Young ,  Yen-Ru Lee ,  Chii-Horng Li ,  Tze-Liang Lee

Inventor： Harry-Hak-Lay Chuang ,  Sin-Hua Wu ,  Chung-Hau Fei ,  Ming Zhu ,  Bao-Ru Young ,  Yen-Ru Lee ,  Chii-Horng Li ,  Tze-Liang Lee

IPC: H01L21/8238

CPC classification number: H01L27/1116 ,  H01L21/823807 ,  H01L21/823814

Abstract: A method includes forming a first gate stack of a first device over a semiconductor substrate, and forming a second gate stack of a second MOS device over the semiconductor substrate. A first epitaxy is performed to form a source/drain stressor for the second MOS device, wherein the source/drain stressor is adjacent to the second gate stack. A second epitaxy is performed to form a first silicon layer and a second silicon layer simultaneously, wherein the first silicon layer is over a first portion of the semiconductor substrate, and is adjacent the first gate stack. The second silicon layer overlaps the source/drain stressor.

Abstract translation: 一种方法包括在半导体衬底上形成第一器件的第一栅极堆叠，以及在半导体衬底上形成第二MOS器件的第二栅极堆叠。 执行第一外延以形成用于第二MOS器件的源/漏应力源，其中源极/漏极应力器与第二栅极堆叠相邻。 执行第二外延以同时形成第一硅层和第二硅层，其中第一硅层位于半导体衬底的第一部分之上并且与第一栅极堆叠相邻。 第二硅层与源极/漏极应力源重叠。

公开(公告)号：US08889501B2

公开(公告)日：2014-11-18

申请号：US13486240

申请日：2012-06-01

Applicant: Harry-Hak-Lay Chuang ,  Sin-Hua Wu ,  Chung-Hau Fei ,  Ming Zhu ,  Bao-Ru Young ,  Yen-Ru Lee ,  Chii-Horng Li ,  Tze-Liang Lee

Inventor： Harry-Hak-Lay Chuang ,  Sin-Hua Wu ,  Chung-Hau Fei ,  Ming Zhu ,  Bao-Ru Young ,  Yen-Ru Lee ,  Chii-Horng Li ,  Tze-Liang Lee

IPC: H01L21/336 ,  H01L21/8238 ,  H01L27/11

CPC classification number: H01L27/1116 ,  H01L21/823807 ,  H01L21/823814

Abstract: A method includes forming a first gate stack of a first device over a semiconductor substrate, and forming a second gate stack of a second MOS device over the semiconductor substrate. A first epitaxy is performed to form a source/drain stressor for the second MOS device, wherein the source/drain stressor is adjacent to the second gate stack. A second epitaxy is performed to form a first silicon layer and a second silicon layer simultaneously, wherein the first silicon layer is over a first portion of the semiconductor substrate, and is adjacent the first gate stack. The second silicon layer overlaps the source/drain stressor.

Abstract translation: 一种方法包括在半导体衬底上形成第一器件的第一栅极堆叠，以及在半导体衬底上形成第二MOS器件的第二栅极堆叠。 执行第一外延以形成用于第二MOS器件的源/漏应力源，其中源极/漏极应力器与第二栅极堆叠相邻。 执行第二外延以同时形成第一硅层和第二硅层，其中第一硅层位于半导体衬底的第一部分之上并且与第一栅极堆叠相邻。 第二硅层与源极/漏极应力源重叠。

公开(公告)号：US20130084682A1

公开(公告)日：2013-04-04

申请号：US13248319

申请日：2011-09-29

Applicant: Yen-Ru LEE ,  Ming-Hua YU ,  Tze-Liang LEE ,  Chii-Horng LI ,  Pang-Yen TSAI ,  Lilly SU ,  Yi-Hung LIN ,  Yu-Hung CHENG

Inventor： Yen-Ru LEE ,  Ming-Hua YU ,  Tze-Liang LEE ,  Chii-Horng LI ,  Pang-Yen TSAI ,  Lilly SU ,  Yi-Hung LIN ,  Yu-Hung CHENG

IPC: H01L21/336

CPC classification number: H01L29/7848 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7845 ,  H01L29/7846

Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of a substrate to enhance carrier mobility and upgrade the device performance. In an embodiment, the improved formation method is achieved using an etching process to redistribute the strained material by removing at least a portion of the corner to be located in the cavity.

Abstract translation: 公开了一种制造半导体器件的方法。 应变材料形成在衬底的空腔中并与衬底中的隔离结构相邻。 应变材料在基底表面上方有一角。 所公开的方法提供了一种用于形成邻近隔离结构的应变材料的改进方法，其中衬底的腔中具有增加的部分，以增强载体移动性并提高器件性能。 在一个实施例中，改进的形成方法是通过使用蚀刻工艺来实现的，该蚀刻工艺通过去除位于空腔中的角部的至少一部分来重新分布应变材料。

公开(公告)号：US08927374B2

公开(公告)日：2015-01-06

申请号：US13252346

申请日：2011-10-04

Applicant: Lilly Su ,  Pang-Yen Tsai ,  Tze-Liang Lee ,  Chii-Horng Li ,  Yen-Ru Lee ,  Ming-Hua Yu

Inventor： Lilly Su ,  Pang-Yen Tsai ,  Tze-Liang Lee ,  Chii-Horng Li ,  Yen-Ru Lee ,  Ming-Hua Yu

IPC: H01L21/336 ,  H01L29/04 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L29/7848 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L27/0617 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/7835

Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of the substrate to enhance carrier mobility and upgrade the device performance. The improved formation method is achieved by providing a treatment to redistribute at least a portion of the corner in the cavity.

Abstract translation: 公开了一种制造半导体器件的方法。 应变材料形成在衬底的空腔中并与衬底中的隔离结构相邻。 应变材料在基底表面上方有一角。 所公开的方法提供了一种用于在隔离结构附近形成应变材料的改进方法，其中在衬底的空腔中增加部分以增强载体移动性并提高器件性能。 改进的形成方法通过提供一种处理来重新分布空腔中角部的至少一部分来实现。

公开(公告)号：US08835267B2

公开(公告)日：2014-09-16

申请号：US13248319

申请日：2011-09-29

Applicant: Yen-Ru Lee ,  Ming-Hua Yu ,  Tze-Liang Lee ,  Chii-Horng Li ,  Pang-Yen Tsai ,  Lilly Su ,  Yi-Hung Lin ,  Yu-Hung Cheng

Inventor： Yen-Ru Lee ,  Ming-Hua Yu ,  Tze-Liang Lee ,  Chii-Horng Li ,  Pang-Yen Tsai ,  Lilly Su ,  Yi-Hung Lin ,  Yu-Hung Cheng

IPC: H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7845 ,  H01L29/7846

Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of a substrate to enhance carrier mobility and upgrade the device performance. In an embodiment, the improved formation method is achieved using an etching process to redistribute the strained material by removing at least a portion of the corner to be located in the cavity.

Abstract translation: 公开了一种制造半导体器件的方法。 应变材料形成在衬底的空腔中并与衬底中的隔离结构相邻。 应变材料在基底表面上方有一角。 所公开的方法提供了一种用于形成邻近隔离结构的应变材料的改进方法，其中衬底的腔中具有增加的部分，以增强载体移动性并提高器件性能。 在一个实施例中，改进的形成方法是通过使用蚀刻工艺来实现的，该蚀刻工艺通过去除位于空腔中的角部的至少一部分来重新分布应变材料。

公开(公告)号：US20130082309A1

公开(公告)日：2013-04-04

申请号：US13252346

申请日：2011-10-04

Applicant: Lilly SU ,  Pang-Yen TSAI ,  Tze-Liang LEE ,  Chii-Horng LI ,  Yen-Ru LEE ,  Ming-Hua YU

Inventor： Lilly SU ,  Pang-Yen TSAI ,  Tze-Liang LEE ,  Chii-Horng LI ,  Yen-Ru LEE ,  Ming-Hua YU

IPC: H01L29/772 ,  H01L21/336 ,  H01L21/02

CPC classification number: H01L29/7848 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L27/0617 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/7835

Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of the substrate to enhance carrier mobility and upgrade the device performance. The improved formation method is achieved by providing a treatment to redistribute at least a portion of the corner in the cavity.

Abstract translation: 公开了一种制造半导体器件的方法。 应变材料形成在衬底的空腔中并与衬底中的隔离结构相邻。 应变材料在基底表面上方有一角。 所公开的方法提供了一种用于在隔离结构附近形成应变材料的改进方法，其中在衬底的空腔中增加部分以增强载体移动性并提高器件性能。 改进的形成方法通过提供一种处理来重新分布空腔中角部的至少一部分来实现。