公开(公告)号：US20070107845A1

公开(公告)日：2007-05-17

申请号：US11623573

申请日：2007-01-16

申请人： Shigeru Ishizawa ,  Hiroaki Saeki ,  Yoshimitsu Tamura ,  Shigetoshi Hosaka ,  Masahide Itoh ,  Kazushi Tahara ,  Yasushi Kodashima

发明人： Shigeru Ishizawa ,  Hiroaki Saeki ,  Yoshimitsu Tamura ,  Shigetoshi Hosaka ,  Masahide Itoh ,  Kazushi Tahara ,  Yasushi Kodashima

IPC分类号： C23F1/00 ,  H01L21/306 ,  C23C16/00

CPC分类号： H01L21/67751 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67184 ,  H01L21/67201

摘要： A semiconductor processing system includes an intermediate structure disposed between an atmospheric pressure entrance transfer chamber and a vacuum common transfer chamber. The intermediate structure includes a transfer passage for a target substrate to pass therein. The transfer passage includes a first buffer chamber a middle transfer chamber and a second buffer chamber detachably connected. An additional processing apparatus is detachably connected to the middle transfer chamber. The intermediate structure is selectively arranged in first or second state. In the first state, the additional processing apparatus performs a vacuum process, while the first buffer chamber is a load-lock chamber. In the second state, the additional processing apparatus performs an atmospheric pressure process, while the second buffer chamber is a load-lock chamber.

摘要翻译： 半导体处理系统包括设置在大气压入口传送室和真空公共传送室之间的中间结构。 中间结构包括用于目标基板的传送通道。 传送通道包括第一缓冲室，中间传送室和可拆卸地连接的第二缓冲室。 附加处理装置可拆卸地连接到中间传送室。 中间结构选择性地布置在第一或第二状态。 在第一状态下，附加处理装置执行真空处理，而第一缓冲室是装载锁定室。 在第二状态下，附加处理装置进行大气压处理，而第二缓冲室是装载锁定室。

公开(公告)号：US5679974A

公开(公告)日：1997-10-21

申请号：US353287

申请日：1994-12-05

申请人： Hiroshi Shinriki ,  Yoshimitsu Tamura ,  Tomohiro Ohta

发明人： Hiroshi Shinriki ,  Yoshimitsu Tamura ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/00 ,  H01L29/04

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： An antifuse element for a semiconductor device, comprising a bottom electrode made from a conductive material containing a refractory metal and a top electrode made from a conductive material containing a fusible metal. The fusible metal is Al, Al alloy, Cu or Ag. The Al alloy contains at least Si, Cu, Sc, Pd, Ti, Ta or Nb. The refractory metal is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo or W. Silicides are most preferable as the refractory metal. The semiconductor device is programmed by making the top electrode negative or positive and by applying a breakdown voltage between the bottom and top electrodes so as to break down an antifuse material layer, thereby obtaining a filament. The filament is made from the fusible metal from the top electrode and the refractory metal from the bottom electrode. Thus, the filament has a low resistance, and a good EM resistance.

摘要翻译： 一种用于半导体器件的反熔丝元件，包括由含有难熔金属的导电材料制成的底电极和由含有可熔金属的导电材料制成的顶电极。 易熔金属是Al，Al合金，Cu或Ag。 Al合金至少含有Si，Cu，Sc，Pd，Ti，Ta或Nb。 难熔金属是Ti，Zr，Hf，V，Nb，Ta，Cr，Mo或W.作为难熔金属，最优选的是硅化物。 半导体器件通过使顶部电极为负极或正极并通过在底部电极和顶部电极之间施加击穿电压来编程，以便分解反熔丝材料层，从而获得细丝。 长丝由顶部电极的熔融金属和来自底部电极的难熔金属制成。 因此，灯丝具有低电阻和良好的电磁电阻。

公开(公告)号：US5641985A

公开(公告)日：1997-06-24

申请号：US353294

申请日：1994-12-05

申请人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

发明人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： Antifuse elements for a semiconductor device comprise a bottom electrode, a top electrode, and an antifuse material layer. The bottom electrode is formed of a conductive material having an amorphous structure. The conductive material contains such elements as W, Ti, or a compound thereof. Since there is no grain boundary on the surface of the bottom electrode having an amorphous structure, any sharp protrusions are diminished to promote the smoothness. The antifuse material film is mounted on the surface of the bottom electrode. The bottom electrode contains such elements having an excellent EM resistance as W, Mo. These elements are also to be contained in a filament which is formed after programming.

摘要翻译： 用于半导体器件的消烟元件包括底部电极，顶部电极和反熔丝材料层。 底部电极由具有非晶结构的导电材料形成。 导电材料含有W，Ti或其化合物等元素。 由于在具有非晶结构的底部电极的表面上没有晶界，所以任何尖锐的突起都会减小，以促进平滑度。 反熔丝材料膜安装在底部电极的表面上。 底部电极包含具有优异的EM电阻的元件，如W，Mo。这些元件也包含在编程之后形成的灯丝中。

公开(公告)号：US5565702A

公开(公告)日：1996-10-15

申请号：US353296

申请日：1994-12-05

申请人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

发明人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： An antifuse element provided on a semiconductor device comprises a bottom electrode, an antifuse material layer, and a top electrode. At least the uppermost portion of the bottom electrode is made of metallic silicide in which the metal composition ratio is set to greater than the stoichiometry composition ratio. The metallic silicide is obtained by silicidizing the metal at a temperature of 400.degree.-700.degree. C. The crystal orientation of the thus formed metallic silicide is at random, and therefore the surface of the bottom electrode made of metallic silicide becomes flatter and smoother. The metal component of the metallic silicide is effectively used in the forming of the filament when a breakdown voltage is applied to the selected electrodes for an electrical connection.

摘要翻译： 设置在半导体器件上的反熔丝元件包括底电极，反熔丝材料层和顶电极。 至少底部电极的最上部由金属硅化物制成，其中金属组成比设定为大于化学计量组成比。 金属硅化物是通过在400〜700℃的温度下对金属进行硅化而得到的。由此形成的金属硅化物的晶体取向是随机的，因此由金属硅化物制成的底部电极的表面变得更扁平。 当对选择的电极进行电连接时施加击穿电压时，金属硅化物的金属成分有效地用于灯丝的形成。

公开(公告)号：US06249472B1

公开(公告)日：2001-06-19

申请号：US09215109

申请日：1998-12-18

申请人： Yoshimitsu Tamura ,  Takumi Nasu ,  Hideyuki Fukuhara ,  Shigeki Numaga

发明人： Yoshimitsu Tamura ,  Takumi Nasu ,  Hideyuki Fukuhara ,  Shigeki Numaga

IPC分类号： G11C700

CPC分类号： H01L27/10882 ,  G11C17/18 ,  H01L23/5252 ,  H01L27/10852 ,  H01L27/10894 ,  H01L2924/0002 ,  H01L2924/00

摘要： The objective of the invention is to provide a type of semiconductor memory device whose antifuse can be formed without any additional film manufacturing process. A first electrode is formed by a first polysilicon film 37 formed on semiconductor substrate 30 and a second polysilicon film 39 deposited on the surface of the first polysilicon film. The first electrode, a dielectric film formed on the surface of the first electrode, and a second electrode form capacitor 11 in the memory cell. An antifuse 12 with the same configuration as capacitor 11 is formed in the semiconductor memory device. Because there is no need to use an additional film, the manufacturing cost is low, and antifuse 12 can be easily arranged. It is also possible to form antifuse 13 by forming instead of depositing the second polysilicon film 39 on the surface of the first polysilicon film 39.

摘要翻译： 本发明的目的是提供一种半导体存储器件，其反熔丝可以在没有任何附加的膜制造工艺的情况下形成。 第一电极由形成在半导体衬底30上的第一多晶硅膜37和沉积在第一多晶硅膜的表面上的第二多晶硅膜39形成。 第一电极，形成在第一电极的表面上的电介质膜和存储单元中的第二电极形成电容器11。 在半导体存储器件中形成具有与电容器11相同结构的反熔丝12。 因为不需要使用额外的薄膜，所以制造成本低，并且可以容易地布置反熔丝12。 还可以通过形成反熔丝13而不是在第一多晶硅膜39的表面上沉积第二多晶硅膜39。

公开(公告)号：US6093642A

公开(公告)日：2000-07-25

申请号：US354508

申请日：1999-07-15

申请人： Chih-Chen Cho ,  Yoshimitsu Tamura ,  Jiong-Ping Lu

发明人： Chih-Chen Cho ,  Yoshimitsu Tamura ,  Jiong-Ping Lu

IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L21/285 ,  H01L23/485 ,  H01L21/4763

CPC分类号： H01L21/28518 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76877 ,  H01L23/485 ,  H01L2924/0002

摘要： A contact and method of forming a contact. A layer of titanium (112) is deposited. Then, a RTP anneal is performed to react the titanium layer (112) with underlying silicon (112) to form a silicide layer (114). After the RTP anneal, a layer of tungsten-nitride (116) is deposited as a barrier layer. The metal interconnect layer (118) is then formed over the tungsten-nitride layer (116).

摘要翻译： 形成接触的接触和方法。 沉积一层钛（112）。 然后，执行RTP退火以使钛层（112）与下面的硅（112）反应以形成硅化物层（114）。 在RTP退火之后，沉积一层氮化钨（116）作为阻挡层。 然后在氮化钨层（116）之上形成金属互连层（118）。