公开(公告)号：US5679974A

公开(公告)日：1997-10-21

申请号：US353287

申请日：1994-12-05

申请人： Hiroshi Shinriki ,  Yoshimitsu Tamura ,  Tomohiro Ohta

发明人： Hiroshi Shinriki ,  Yoshimitsu Tamura ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/00 ,  H01L29/04

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： An antifuse element for a semiconductor device, comprising a bottom electrode made from a conductive material containing a refractory metal and a top electrode made from a conductive material containing a fusible metal. The fusible metal is Al, Al alloy, Cu or Ag. The Al alloy contains at least Si, Cu, Sc, Pd, Ti, Ta or Nb. The refractory metal is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo or W. Silicides are most preferable as the refractory metal. The semiconductor device is programmed by making the top electrode negative or positive and by applying a breakdown voltage between the bottom and top electrodes so as to break down an antifuse material layer, thereby obtaining a filament. The filament is made from the fusible metal from the top electrode and the refractory metal from the bottom electrode. Thus, the filament has a low resistance, and a good EM resistance.

摘要翻译： 一种用于半导体器件的反熔丝元件，包括由含有难熔金属的导电材料制成的底电极和由含有可熔金属的导电材料制成的顶电极。 易熔金属是Al，Al合金，Cu或Ag。 Al合金至少含有Si，Cu，Sc，Pd，Ti，Ta或Nb。 难熔金属是Ti，Zr，Hf，V，Nb，Ta，Cr，Mo或W.作为难熔金属，最优选的是硅化物。 半导体器件通过使顶部电极为负极或正极并通过在底部电极和顶部电极之间施加击穿电压来编程，以便分解反熔丝材料层，从而获得细丝。 长丝由顶部电极的熔融金属和来自底部电极的难熔金属制成。 因此，灯丝具有低电阻和良好的电磁电阻。

公开(公告)号：US5641985A

公开(公告)日：1997-06-24

申请号：US353294

申请日：1994-12-05

申请人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

发明人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： Antifuse elements for a semiconductor device comprise a bottom electrode, a top electrode, and an antifuse material layer. The bottom electrode is formed of a conductive material having an amorphous structure. The conductive material contains such elements as W, Ti, or a compound thereof. Since there is no grain boundary on the surface of the bottom electrode having an amorphous structure, any sharp protrusions are diminished to promote the smoothness. The antifuse material film is mounted on the surface of the bottom electrode. The bottom electrode contains such elements having an excellent EM resistance as W, Mo. These elements are also to be contained in a filament which is formed after programming.

摘要翻译： 用于半导体器件的消烟元件包括底部电极，顶部电极和反熔丝材料层。 底部电极由具有非晶结构的导电材料形成。 导电材料含有W，Ti或其化合物等元素。 由于在具有非晶结构的底部电极的表面上没有晶界，所以任何尖锐的突起都会减小，以促进平滑度。 反熔丝材料膜安装在底部电极的表面上。 底部电极包含具有优异的EM电阻的元件，如W，Mo。这些元件也包含在编程之后形成的灯丝中。

公开(公告)号：US5565702A

公开(公告)日：1996-10-15

申请号：US353296

申请日：1994-12-05

申请人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

发明人： Yoshimitsu Tamura ,  Hiroshi Shinriki ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： An antifuse element provided on a semiconductor device comprises a bottom electrode, an antifuse material layer, and a top electrode. At least the uppermost portion of the bottom electrode is made of metallic silicide in which the metal composition ratio is set to greater than the stoichiometry composition ratio. The metallic silicide is obtained by silicidizing the metal at a temperature of 400.degree.-700.degree. C. The crystal orientation of the thus formed metallic silicide is at random, and therefore the surface of the bottom electrode made of metallic silicide becomes flatter and smoother. The metal component of the metallic silicide is effectively used in the forming of the filament when a breakdown voltage is applied to the selected electrodes for an electrical connection.

摘要翻译： 设置在半导体器件上的反熔丝元件包括底电极，反熔丝材料层和顶电极。 至少底部电极的最上部由金属硅化物制成，其中金属组成比设定为大于化学计量组成比。 金属硅化物是通过在400〜700℃的温度下对金属进行硅化而得到的。由此形成的金属硅化物的晶体取向是随机的，因此由金属硅化物制成的底部电极的表面变得更扁平。 当对选择的电极进行电连接时施加击穿电压时，金属硅化物的金属成分有效地用于灯丝的形成。

公开(公告)号：US5652180A

公开(公告)日：1997-07-29

申请号：US264928

申请日：1994-06-24

申请人： Hiroshi Shinriki ,  Hiroshi Yamamoto ,  Nobuyuki Takeyasu ,  Takayuki Komiya ,  Tomohiro Ohta

发明人： Hiroshi Shinriki ,  Hiroshi Yamamoto ,  Nobuyuki Takeyasu ,  Takayuki Komiya ,  Tomohiro Ohta

IPC分类号： H01L21/768 ,  H01L21/285

CPC分类号： H01L21/76879 ,  H01L2924/0002

摘要： A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of high melting point metal deposited on the diffusion region, an insulating film formed on the silicon substrate, a contact hole formed in the insulating film such that the silicide film is exposed at a bottom of the contact hole, an anti-diffusion film formed on the exposed surface of the silicide film at the bottom of the contact film, a plug formed in the contact hole by a selective Al CVD, and a metal wiring formed on the insulating film such that the metal wiring is electrically connected to the diffusion region by means of the plug, anti-diffusion film and silicide film. The anti-diffusion film may be formed by nitriding the surface of the silicide film.

摘要翻译： 具有接触结构的半导体器件包括硅衬底，形成在硅衬底的表面中的扩散区，沉积在扩散区上的高熔点金属的硅化物膜，形成在硅衬底上的绝缘膜，接触孔 形成在绝缘膜上，使得硅化物膜暴露在接触孔的底部，形成在接触膜底部的硅化物膜的暴露表面上的防扩散膜，通过接触孔形成的插塞 选择性Al CVD，以及形成在绝缘膜上的金属布线，使得金属布线通过插塞，防扩散膜和硅化物膜电连接到扩散区。 抗扩散膜可以通过氮化硅化物膜的表面而形成。

公开(公告)号：US5627102A

公开(公告)日：1997-05-06

申请号：US569319

申请日：1995-12-08

申请人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Nobuyuki Takeyasu ,  Tomohiro Ohta ,  Eiichi Kondoh ,  Hiroshi Yamamoto ,  Tomoharu Katagiri ,  Tadashi Nakano ,  Yumiko Kawano

发明人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Nobuyuki Takeyasu ,  Tomohiro Ohta ,  Eiichi Kondoh ,  Hiroshi Yamamoto ,  Tomoharu Katagiri ,  Tadashi Nakano ,  Yumiko Kawano

IPC分类号： H01L21/285 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/28

CPC分类号： H01L21/76838 ,  H01L21/28556 ,  H01L21/32136 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L23/53223 ,  H01L2924/0002

摘要： A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connection holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage. The thus fabricated metal interconnection has improved reliability including electromigration immunity when used in semiconductor devices and finding advantageous use in miniaturized semiconductor devices.

摘要翻译： 通过在半导体衬底之上形成诸如Ti和/或高熔点金属化合物如TiN层的高熔点金属的下面的金属膜，在等离子体中蚀刻下面的金属膜的表面，在含有 并在下面的金属膜上形成诸如Al，Cu，Au和Ag的互连金属膜。 或者，通过在半导体衬底上形成绝缘膜，在绝缘膜上形成连接孔，通过CVD在绝缘膜上形成TiN等下面的金属膜，形成连接孔的底壁和侧壁，形成金属互连 在控制条件下进行处理，并在底层金属膜上形成互连金属膜如Al。 TiN膜具有（111）优先取向，铝膜具有（111）优先取向，表面光滑，有效覆盖。 如此制造的金属互连具有改进的可靠性，包括当用于半导体器件中的电迁移抗扰性并且在小型化的半导体器件中发现有利的用途。

公开(公告)号：US5521423A

公开(公告)日：1996-05-28

申请号：US228257

申请日：1994-04-15

申请人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Tomohiro Ohta

发明人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Tomohiro Ohta

IPC分类号： H01L23/525 ,  H01L29/04 ,  H01L27/10 ,  H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002

摘要： An antifuse element suitable for use in FPGA. When a device is miniaturized to reduce the write voltage in an antifuse element and as the film thickness of the antifuse dielectric film is being reduced, the dielectric breakdown voltage is greatly variable due to the irregularity of the underlying metal. If the dielectric film is formed by a metal oxide having a relatively high specific permitivity without changing its parasitic capacity as compared to the prior art, the film thickness of the dielectric film can be increased in comparison with oxide and nitride films formed according to the prior art. The irregularity of the underlying metal can be reduced by coating it with a metal nitride or TiB film or TiC film. To equalize the dielectric breakdown voltage, another insulation film having a film thickness such that the direct tunnel conduction is dominant is formed below the metal oxide. To reduce the irregularity of the metal surface and to reduce the resistance after dielectric breakdown, an amorphous silicon layer is deposited before the metal oxide is deposited thereover to form a laminated film.

摘要翻译： 适用于FPGA的反熔丝元件。 当器件小型化以降低反熔丝元件中的写入电压时，并且由于反熔丝电介质膜的膜厚度正在减小，所以介电击穿电压由于下面的金属的不规则性而极大地变化。 如果与现有技术相比，电介质膜由具有相对高的比容容的金属氧化物形成而不改变其寄生电容，则与根据现有技术形成的氧化物和氮化物膜相比，电介质膜的膜厚可以增加 艺术。 可以通过用金属氮化物或TiB膜或TiC膜涂覆来降低底层金属的不规则性。 为了均衡绝缘击穿电压，具有膜厚度使得直接隧道导通为主的另一绝缘膜形成在金属氧化物的下面。 为了减少金属表面的不规则性并且在介电击穿之后降低电阻，在将金属氧化物沉积在其之前形成非晶硅层以形成层压膜。

公开(公告)号：US06063703A

公开(公告)日：2000-05-16

申请号：US81047

申请日：1998-05-19

申请人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Nobuyuki Takeyasu ,  Tomohiro Ohta ,  Eiichi Kondoh ,  Hiroshi Yamamoto ,  Tomoharu Katagiri ,  Tadashi Nakano ,  Yumiko Kawano

发明人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Nobuyuki Takeyasu ,  Tomohiro Ohta ,  Eiichi Kondoh ,  Hiroshi Yamamoto ,  Tomoharu Katagiri ,  Tadashi Nakano ,  Yumiko Kawano

IPC分类号： H01L21/285 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/44

CPC分类号： H01L21/76838 ,  H01L21/28556 ,  H01L21/32136 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L23/53223 ,  H01L2924/0002

摘要： A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connecting holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage. The thus fabricated metal interconnection has improved reliability including electromigration immunity when used in semiconductor devices and finding advantageous use in miniaturized semiconductor devices.

摘要翻译： 通过在半导体衬底之上形成诸如Ti和/或高熔点金属化合物如TiN层的高熔点金属的下面的金属膜，在等离子体中蚀刻下面的金属膜的表面，在含有 并在下面的金属膜上形成诸如Al，Cu，Au和Ag的互连金属膜。 或者，通过在半导体衬底上形成绝缘膜，在绝缘膜上形成连接孔，在绝缘膜上形成诸如TiN的下面的金属膜和连接孔的底壁和侧壁，通过CVD 在控制条件下进行处理，并在底层金属膜上形成互连金属膜如Al。 TiN膜具有（111）优先取向，铝膜具有（111）优先取向，表面光滑，有效覆盖。 如此制造的金属互连具有改进的可靠性，包括当用于半导体器件中的电迁移抗扰性并且在小型化的半导体器件中发现有利的用途。

公开(公告)号：US5973402A

公开(公告)日：1999-10-26

申请号：US791161

申请日：1997-01-30

申请人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Nobuyuki Takeyasu ,  Tomohiro Ohta ,  Eiichi Kondoh ,  Hiroshi Yamamoto ,  Tomoharu Katagiri ,  Tadashi Nakano ,  Yumiko Kawano

发明人： Hiroshi Shinriki ,  Takeshi Kaizuka ,  Nobuyuki Takeyasu ,  Tomohiro Ohta ,  Eiichi Kondoh ,  Hiroshi Yamamoto ,  Tomoharu Katagiri ,  Tadashi Nakano ,  Yumiko Kawano

IPC分类号： H01L21/285 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76838 ,  H01L21/28556 ,  H01L21/32136 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76877 ,  H01L23/53223 ,  H01L2924/0002

摘要： A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connection holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage. The thus fabricated metal interconnection has improved reliability including electromigration immunity when used in semiconductor devices and finding advantageous use in miniaturized semiconductor devices.

摘要翻译： 通过在半导体衬底之上形成诸如Ti和/或高熔点金属化合物如TiN层的高熔点金属的下面的金属膜，在等离子体中蚀刻下面的金属膜的表面，在含有 并在下面的金属膜上形成诸如Al，Cu，Au和Ag的互连金属膜。 或者，通过在半导体衬底上形成绝缘膜，在绝缘膜上形成连接孔，通过CVD在绝缘膜上形成TiN等下面的金属膜，形成连接孔的底壁和侧壁，形成金属互连 在控制条件下进行处理，并在底层金属膜上形成互连金属膜如Al。 TiN膜具有（111）优先取向，铝膜具有（111）优先取向，表面光滑，有效覆盖。 如此制造的金属互连具有改进的可靠性，包括当用于半导体器件中的电迁移抗扰性并且在小型化的半导体器件中发现有利的用途。

公开(公告)号：US20050227500A1

公开(公告)日：2005-10-13

申请号：US10509372

申请日：2003-03-31

申请人： Takuya Sugawara ,  Yoshihide Tada ,  Tomohiro Ohta

发明人： Takuya Sugawara ,  Yoshihide Tada ,  Tomohiro Ohta

IPC分类号： C23C16/511 ,  H01J37/32 ,  H01L21/02 ,  H01L21/316 ,  H01L21/336

CPC分类号： H01L21/02274 ,  C23C16/511 ,  H01J37/32192 ,  H01J37/3222 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02172 ,  H01L21/31604 ,  H01L21/31662 ,  H01L21/31691 ,  H01L28/56

摘要： A film is formed on the surface of an electronic device substrate by using plasma based on microwave irradiation via a plane antenna member having a plurality of slits in the presence of a process gas comprising at least a gas containing a film-forming substance and a rare gas. An insulating film capable of forming an electronic device substrate with an insulating film having a good electrical property can be formed.

摘要翻译： 在包含至少含有成膜物质的气体和罕见的气体的工艺气体的存在下，通过使用具有多个狭缝的平面天线构件，通过使用基于微波照射的等离子体，在电子器件基板的表面上形成膜 加油站。 可以形成能够形成具有良好电性能的绝缘膜的电子器件基板的绝缘膜。

公开(公告)号：US5552181A

公开(公告)日：1996-09-03

申请号：US170789

申请日：1993-12-21

申请人： Eiichi Kondoh ,  Toru Mitomo ,  Hiroshi Yamamoto ,  Tomohiro Ohta

发明人： Eiichi Kondoh ,  Toru Mitomo ,  Hiroshi Yamamoto ,  Tomohiro Ohta

IPC分类号： C23C16/20 ,  C23C16/448 ,  H01L21/205 ,  H01L21/31 ,  H01L21/3205 ,  H01L23/52 ,  C23C16/00

CPC分类号： C23C16/4482

摘要： A method of supplying, in a gaseous phase, a material which is in a viscous liquid phase at normal temperature. The viscous liquid material is provided in a bubbler and the pressure of the vessel is maintained below atmospheric pressure. A carrier gas is supplied through a nozzle opening in the liquid material inside the vessel. The carrier gas is temporarily dissolved in the liquid and then released to form fine bubbles into which the liquid material is vaporized, so that the vapor of the material is supplied together with the carrier gas.

摘要翻译： 在气相中以常温下处于粘稠液相的材料的方法。 将粘性液体材料设置在起泡器中，并将容器的压力保持在大气压以下。 载气通过容器内的液体材料中的喷嘴开口供给。 载气暂时溶解在液体中，然后释放，形成液体物质蒸发的微小气泡，使得材料的蒸气与载气一起供给。