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公开(公告)号：US20240339337A1
公开(公告)日：2024-10-10
申请号：US18671508
申请日：2024-05-22
发明人： Daigi KAMIMURA , Tomoshi TANIYAMA , Takashi NOGAMI
IPC分类号： H01L21/67 , C23C16/44 , H01L21/02 , H01L21/677
CPC分类号： H01L21/67017 , H01L21/02 , H01L21/67109 , H01L21/67178 , H01L21/67184 , H01L21/6719 , H01L21/67196 , H01L21/67757 , C23C16/4412 , H01L21/67201
摘要： A substrate processing apparatus includes a first processing module including a first processing module, a second processing module, a first utility system adjacent to a back surface of the first processing module, and a second utility system adjacent to a back surface of the second processing module, a first exhaust box of the first utility system and a second exhaust box of the second utility system being disposed to face each other across a maintenance area located behind a part of the back surface of the first processing module that is close to the second processing module and behind a part of the back surface of the second processing module that is close to the first processing module, and a first supply box of the first utility system and a second supply box of the second utility system being disposed to face each other across the maintenance area.
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公开(公告)号：US12094739B2
公开(公告)日：2024-09-17
申请号：US17767248
申请日：2020-10-05
CPC分类号： H01L21/67201 , B08B5/02 , B08B13/00 , B08B15/04
摘要： A method for cleaning a load lock in a substrate processing system includes, in a first period, opening a first valve in fluid communication with a gas source to supply gas through a first vent into a gas volume of the load lock. The gas is supplied at a pressure and flow rate sufficient to disturb particles from surfaces of the load lock. The method includes, in a second period subsequent to the first period and with the first valve opened, opening a second valve in fluid communication with a pump and turning on the pump to flush the gas and particles from the gas volume of the load lock, and, in a third period subsequent to the second period, closing the first valve while continuing to pump the gas and the particles from the gas volume of the load lock via the second valve.
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公开(公告)号：US20240297056A1
公开(公告)日：2024-09-05
申请号：US18131860
申请日：2023-04-06
发明人： HAIPENG ZHU , XIJUN GUO , Min-Hsien Chen , KUO LIANG HUANG , WEN YI TAN
IPC分类号： H01L21/67
CPC分类号： H01L21/67201 , H01L21/67126
摘要： The invention provides a semiconductor processing machine, which comprises a plurality of chambers, at least one of the chamber is a load-lock chamber, and the load-lock chamber comprises a bottom surface and a top lid opposite to the bottom surface; and a gas pipeline is connected with the top lid of the load-lock chamber.
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公开(公告)号：US20240263308A1
公开(公告)日：2024-08-08
申请号：US18640875
申请日：2024-04-19
发明人： Dong Won SEO , Dong Suk KANG , Yoo Seong KIM , Jeong Sub SHIN , Kyu Beom LEE
IPC分类号： C23C16/455 , C23C16/44 , H01L21/02 , H01L21/67
CPC分类号： C23C16/45536 , C23C16/4412 , C23C16/45557 , H01L21/02697 , H01L21/67201
摘要： A substrate treatment apparatus including a process chamber configured to process a wafer therein; a load lock chamber configured to accommodate the wafer and configured to switch between an atmospheric state and a vacuum state; and a load lock radical supply configured to supply radicals into the load lock chamber. The substrate treatment apparatus further including: a front opening unified pod (FOUP) configured to accommodate the wafer; an equipment front end module (EFEM) provided between the FOUP and the load lock chamber, the EFEM configured to transfer the wafer to the load lock chamber in the atmospheric state; and a transfer chamber provided between the process chamber and the load lock chamber, the transfer chamber configured to transfer the wafer to the process chamber in the vacuum state
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公开(公告)号：US20240249961A1
公开(公告)日：2024-07-25
申请号：US18625330
申请日：2024-04-03
发明人： Chien-Fa Lee , Hsu-Shui Liu , Jiun-Rong Pai , Shou-Wen Kuo
IPC分类号： H01L21/67 , H01L21/677 , H01L21/68 , H01L21/687
CPC分类号： H01L21/67201 , H01L21/67259 , H01L21/67766 , H01L21/67775 , H01L21/681 , H01L21/68707
摘要： The present disclosure relates to a method of programming an EFEM. The method includes placing an automatic teaching element within an EFEM chamber at a first time. The automatic teaching element is operated at a second time to measure one or more parameters corresponding to an initial position of an EFEM robot within the EFEM chamber. The automatic teaching element is removed from the EFEM chamber at a third time and then placed within the EFEM chamber at a fourth time. The automatic teaching element is operated at a fifth time to determine positional parameters describing a difference between the initial position and a new position of the EFEM robot. A second plurality of steps are determined based upon the positional parameters. The EFEM robot is configured to move along the second plurality of steps that extend along a path between first and second positions.
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6.发明公开公开(公告)号：US20240222176A1
公开(公告)日：2024-07-04
申请号：US18397549
申请日：2023-12-27
申请人： ASM IP Holding B.V.
发明人： Yoshiyuki Umeoka
IPC分类号： H01L21/677 , H01L21/67 , H01L21/68 , H01L21/687
CPC分类号： H01L21/67745 , H01L21/67161 , H01L21/67201 , H01L21/67259 , H01L21/67706 , H01L21/67742 , H01L21/68 , H01L21/68707
摘要： A wafer processing apparatus and a method thereof are presented. The apparatus comprising a first loadlock and a second loadlock, a first wafer handling chamber comprising a first robot, pass-through chamber comprising upper slots and lower slots, a second wafer handling chamber comprising a second robot, and a scheduling unit configured to schedule movements of the plurality of wafers by the first robot and the second robot, wherein the scheduling unit configured to schedule the first robot to move wafers originated from the first loadlock from the at least one intermediate chamber into the at least one first upper slot and to move wafers originated from the second loadlock from the at least one intermediate chamber into the at least one second upper slot and further configured to schedule the first robot to move a wafer originated from the first loadlock from the at least one intermediate chamber into one of the at least one second upper slot when all the at least one first upper slot are occupied by wafers and to move the wafer to the at least one first upper slot when it becomes available and schedule the first robot to move a wafer originated from the second loadlock from the at least one intermediate chamber into one of the at least one first upper slot when all the at least one second upper slot are occupied by wafers and to move the wafer to the at least one second upper slot when it becomes available.
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公开(公告)号：US12002694B2
公开(公告)日：2024-06-04
申请号：US18187345
申请日：2023-03-21
发明人： Radik Sunugatov , Robert Carlson
CPC分类号： H01L21/67201 , B65G49/068
摘要： Substrate loading device including a frame adapted to connect the substrate loading device to a substrate processing apparatus, the frame having a transport opening through which substrates are transported between the substrate loading device and the substrate processing apparatus, a cassette support connected to the frame for holding at least one substrate cassette container for transfer of substrates to and from the at least one substrate cassette container through the transport opening, and selectably variable cassette support purge ports with a variable purge port nozzle outlet, variable between more than one selectable predetermined purge port nozzle characteristics, disposed on the cassette support, each of the more than one purge port nozzle characteristics being configured so that the purge port nozzle outlet with each selected predetermined purge port nozzle characteristic complements and couples to at least one purge port of the at least one substrate cassette container.
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公开(公告)号：US20240145271A1
公开(公告)日：2024-05-02
申请号：US17977422
申请日：2022-10-31
IPC分类号： H01L21/67 , H01L21/677 , H01L21/687
CPC分类号： H01L21/67201 , H01L21/67718 , H01L21/68707
摘要： A system for transferring semiconductor workpieces from a load lock to an orientation station and onto a platen is disclosed. The system comprises two load locks, a multi-workpiece orientation station, two multi-pick robots that transfer a plurality of workpieces between a respective load lock and the multi-workpiece orientation station, and two backend robots that transfer individual workpieces between the multi-workpiece orientation station and the platen.
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公开(公告)号：US20240145270A1
公开(公告)日：2024-05-02
申请号：US17977417
申请日：2022-10-31
IPC分类号： H01L21/67 , H01L21/677 , H01L21/687
CPC分类号： H01L21/67201 , H01L21/67718 , H01L21/68707
摘要： A system for transferring semiconductor workpieces from a load lock to an orientation station and on to a platen is disclosed. The system comprises two load locks, two robots, and one orientation station. Each robot is associated with a respective load lock and follows a fixed sequence. The robot returns a processed workpiece to the load lock and also removes an unprocessed workpiece. The robot then moved to the orientation station, where it removes an aligned workpiece from the orientation station and deposits the unprocessed workpiece on the orientation station. Next, the robot moves to the platen, where it removes a processed workpiece and deposits the aligned workpiece. The robot then returns to the load lock and repeats this sequence.
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公开(公告)号：US20240120226A1
公开(公告)日：2024-04-11
申请号：US18474953
申请日：2023-09-26
申请人： ASM IP Holding, B.V.
发明人： Yoshiyuki Umeoka
IPC分类号： H01L21/677 , G05B19/418 , H01L21/67
CPC分类号： H01L21/67745 , G05B19/41865 , H01L21/67201 , H01L21/67276 , H01L21/67706 , H01L21/67742
摘要： A wafer processing apparatus may be presented. The apparatus comprising a first loadlock and a second loadlock, at least one extra chambers for preprocessing or postprocessing the wafers, at least one reaction chambers configured to process the wafers, a first wafer handling chamber comprising a first robot, the first robot configured to move wafers between the first and second loadlocks and the extra chambers, a second wafer handling chamber comprising a second robot, the second robot configured to move wafers between the reaction chambers and a pass-through chamber, a pass-through chamber configured to stack wafers from both the first wafer handling chamber and the second wafer handling chamber; and a scheduling unit configured to schedule movements of the plurality of wafers by the first robot and the second robot.
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