公开(公告)号：US08697544B2

公开(公告)日：2014-04-15

申请号：US13126993

申请日：2009-10-14

申请人： Tohru Ishizuka ,  Norihiro Kobayashi ,  Nobuhiko Noto

发明人： Tohru Ishizuka ,  Norihiro Kobayashi ,  Nobuhiko Noto

IPC分类号： H01L21/30

CPC分类号： H01L21/76254

摘要： The present invention is a method for manufacturing a bonded wafer including at least the steps of: forming an ion-implanted layer inside a bond wafer; bringing the ion-implanted surface of the bond wafer into close contact with a surface of a base wafer directly or through a silicon oxide film; and performing heat treatment for delaminating the bond wafer at the ion-implanted layer, wherein the heat treatment step for delaminating includes performing a pre-annealing at a temperature of less than 500° C. and thereafter performing a delamination heat treatment at a temperature of 500° C. or more, and the pre-annealing is performed at least by a heat treatment at a first temperature and a subsequent heat treatment at a second temperature higher than the first temperature. As a result, there is provided a method for manufacturing a bonded wafer having high quality, for example, mainly the reduction of defects, by forming a high bonding strength state at a lower temperature than the temperature at which the delamination is caused, in the manufacture of the bonded wafer by the Smart Cut method (registered trademark).

摘要翻译： 本发明是一种制造接合晶片的方法，至少包括以下步骤：在接合晶片内形成离子注入层; 使接合晶片的离子注入表面直接或通过氧化硅膜与基底晶片的表面紧密接触; 以及进行用于使离子注入层剥离接合晶片的热处理，其中用于分层的热处理步骤包括在小于500℃的温度下进行预退火，然后在温度为 至少通过在第一温度下的热处理和在比第一温度高的第二温度进行随后的热处理来进行预退火。 结果，提供了一种制造高质量的接合晶片的方法，例如主要是减少缺陷，通过在比分层的温度低的温度下形成高的结合强度状态，在 通过Smart Cut方法（注册商标）制造贴合晶片。

公开(公告)号：US08466538B2

公开(公告)日：2013-06-18

申请号：US12867922

申请日：2009-02-19

申请人： Tohru Ishizuka ,  Nobuhiko Noto ,  Norihiro Kobayashi ,  Masatake Nakano

发明人： Tohru Ishizuka ,  Nobuhiko Noto ,  Norihiro Kobayashi ,  Masatake Nakano

IPC分类号： H01L29/04

CPC分类号： H01L21/76254 ,  H01L29/045 ,  H01L29/78603

摘要： The present invention is an SOI wafer comprising at least: an SOI layer; a silicon oxide film; and a base wafer, wherein the SOI layer has a plane orientation of (100), and the base wafer has a resistivity of 100 Ω·cm or more and a plane orientation different from (100). As a result, there is provided the SOI wafer and the manufacturing method thereof that have no complicated manufacturing step, defects on a bonding interface which are not practically a problem in number and a high interface state density (Dit) for trapping carriers on an interface of a BOX layer and the base wafer.

摘要翻译： 本发明是至少包括SOI层的SOI晶片; 氧化硅膜; 和基底晶片，其中所述SOI层具有（100）的平面取向，并且所述基底晶片的电阻率为100Ω·cm以上且平面取向不同于（100）。 结果，提供了没有复杂的制造步骤的SOI晶片及其制造方法，接合界面上的缺陷在数量上几乎不成问题，并且用于在接口上捕获载体的高界面态密度（Dit） 的BOX层和基底晶片。

公开(公告)号：US20120326268A1

公开(公告)日：2012-12-27

申请号：US13582614

申请日：2011-03-01

申请人： Masahiro Kato ,  Satoshi Oka ,  Norihiro Kobayashi ,  Tohru Ishizuka ,  Nobuhiko Noto

发明人： Masahiro Kato ,  Satoshi Oka ,  Norihiro Kobayashi ,  Tohru Ishizuka ,  Nobuhiko Noto

IPC分类号： H01L29/06 ,  H01L21/20 ,  H01L21/762 ,  H01L29/02

CPC分类号： H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/76254 ,  H01L29/78603

摘要： A silicon epitaxial wafer having a silicon epitaxial layer grown by vapor phase epitaxy on a main surface of a silicon single crystal substrate, wherein the main surface of the silicon single crystal substrate is tilted with respect to a [100] axis at an angle θ in a [011] direction or a [0-1-1] direction from a (100) plane and at an angle Φ in a [01-1] direction or a [0-11] direction from the (100) plane, the angle θ and the angle Φ are less than ten minutes, and a dopant concentration of the silicon epitaxial layer is equal to or more than 1×1019/cm3. Even when an epitaxial layer having a dopant concentration of 1×1019/cm3 or more is formed on the main surface of the silicon single crystal substrate, stripe-shaped surface irregularities on the epitaxial layer are inhibited.

摘要翻译： 一种硅外延片，其具有在硅单晶衬底的主表面上通过气相外延生长的硅外延层，其中所述硅单晶衬底的主表面相对于[100]轴以角度倾斜; 在（100）面的[011]方向或[0-1-1]方向上，在（100）面的[01-1]方向或[0-11]方向上的角度Φ处， 角度和角度 角度Φ小于10分钟，硅外延层的掺杂剂浓度为1×1019 / cm3以上。 即使在硅单晶衬底的主表面上形成掺杂浓度为1×1019 / cm3以上的外延层，也抑制了外延层上的条状表面凹凸。

公开(公告)号：US08173521B2

公开(公告)日：2012-05-08

申请号：US12452085

申请日：2008-07-03

申请人： Norihiro Kobayashi ,  Hiroji Aga ,  Yasuo Nagaoka ,  Nobuhiko Noto

发明人： Norihiro Kobayashi ,  Hiroji Aga ,  Yasuo Nagaoka ,  Nobuhiko Noto

IPC分类号： H01L21/30

CPC分类号： H01L21/76254 ,  H01L21/02057 ,  H01L21/26506

摘要： The present invention is a method for manufacturing a bonded wafer by an ion implantation delamination method including at least the steps of, bonding a bond wafer having a micro bubble layer formed by gas ion implantation with a base wafer to be a supporting substrate, delaminating the bond wafer along the micro bubble layer as a boundary to form a thin film on the base wafer, the method comprising, cleaning the bonded wafer after delaminating the bond wafer using ozone water; performing rapid thermal anneal process under a hydrogen containing atmosphere; forming a thermal oxide film on a surface layer of the bonded wafer by subjecting to heat treatment under an oxidizing gas atmosphere and removing the thermal oxide film; subjecting to heat treatment under a non-oxidizing gas atmosphere. As a result, the method for manufacturing a bonded wafer, which can remove the damage caused by the ion implantation and can suppress a occurrence of the concave defects without deterioration of surface roughness on the surface of the thin film of the bonded wafer after delamination is provided.

摘要翻译： 本发明是一种通过离子注入分层方法制造接合晶片的方法，该方法至少包括将具有通过气体离子注入形成的微气泡层的接合晶片与基底晶片接合成为支撑基板的步骤， 沿着微气泡层接合晶片作为边界以在基底晶片上形成薄膜，所述方法包括：在使用臭氧水分离所述接合晶片之后清洁所述接合晶片; 在含氢气氛下进行快速热退火工艺; 通过在氧化气体气氛下进行热处理并除去热氧化膜，在接合晶片的表面层上形成热氧化膜; 在非氧化性气体气氛下进行热处理。 结果，能够去除离子注入引起的损伤的粘合晶片的制造方法，能够抑制脱层后的接合晶片的表面的表面粗糙度的劣化的凹陷缺陷的发生， 提供。

公开(公告)号：US20110151643A1

公开(公告)日：2011-06-23

申请号：US13060558

申请日：2009-08-04

申请人： Norihiro Kobayashi ,  Hiroji Aga ,  Tohru Ishizuka

发明人： Norihiro Kobayashi ,  Hiroji Aga ,  Tohru Ishizuka

IPC分类号： H01L21/762

CPC分类号： H01L21/76254

摘要： A method for manufacturing a bonded wafer by forming an ion implanted layer in a bond wafer; bonding an ion implanted surface of the bond wafer to a surface of a base wafer directly or through a silicon oxide film; and performing a delamination heat treatment. After the formation of the ion implanted layer and before the bonding, a plasma treatment is carried out with respect to a bonding surface of at least one of the bond wafer and the base wafer. The delamination heat treatment is carried out at a fixed temperature by directly putting the bonded wafer into a heat-treating furnace whose furnace temperature is set to the fixed temperature less than 475° C. without a temperature increasing step.

摘要翻译： 一种通过在接合晶片中形成离子注入层来制造接合晶片的方法; 将接合晶片的离子注入表面直接或通过氧化硅膜键合到基底晶片的表面; 并进行分层热处理。 在形成离子注入层之后并且在接合之前，相对于接合晶片和基底晶片中的至少一个的接合表面进行等离子体处理。 通过将接合的晶片直接放入炉温设定在不低于475℃的固定温度的热处理炉中而不进行升温步骤，在固定温度下进行分层热处理。

公开(公告)号：US07902042B2

公开(公告)日：2011-03-08

申请号：US11662285

申请日：2005-09-09

申请人： Hiroji Aga ,  Norihiro Kobayashi ,  Masayuki Imai ,  Tatsuo Enomoto ,  Hiroshi Takeno

发明人： Hiroji Aga ,  Norihiro Kobayashi ,  Masayuki Imai ,  Tatsuo Enomoto ,  Hiroshi Takeno

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L21/76254 ,  H01L21/3226

摘要： A method of manufacturing an SOI wafer includes a bonding step, a thinning and a bonding annealing step. Assuming refractive index n1 of SiO2 as 1.5, refractive index n2 of Si as 3.5, and optical thickness tOP of the silicon oxide film 2 and the SOI layer 15 in the infrared wavelength region as tOP=n1×t1+n2×t2, the thickness t1 of the silicon oxide film 2 and thickness t2 of the SOI layer so as to satisfy a relation of 0.1λ

摘要翻译： 一种制造SOI晶片的方法包括接合步骤，薄化和接合退火步骤。 假设SiO 2的折射率n1为1.5，Si的折射率n2为3.5，红外波长区域中的氧化硅膜2和SOI层15的光学厚度tOP为tOP = n1×t1 + n2×t2，厚度 氧化硅膜2的t1和SOI层的厚度t2以满足0.1λ

公开(公告)号：US07189293B2

公开(公告)日：2007-03-13

申请号：US10482099

申请日：2002-06-25

申请人： Norihiro Kobayashi ,  Masaro Tamatsuka ,  Takatoshi Nagoya ,  Wei Feig Qu ,  Hiroshi Takeno ,  Ken Aihara

发明人： Norihiro Kobayashi ,  Masaro Tamatsuka ,  Takatoshi Nagoya ,  Wei Feig Qu ,  Hiroshi Takeno ,  Ken Aihara

IPC分类号： C30B33/02

CPC分类号： H01L21/324 ,  C30B29/06 ,  C30B33/00 ,  H01L21/3225

摘要： The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.

摘要翻译： 本发明是一种退火晶片的制造方法，其中通过Czochralski（CZ）方法制造的直径为200mm以上的硅单晶晶片在氩气气氛中进行高温热处理， 氢气或其混合气体在1100-1350℃的温度下进行10-600分钟，在高温热处理之前，在低于高温热的温度下进行预退火 从而通过生长氧化物沉淀物来抑制滑移位错的生长。 因此，提供了一种制造退火晶片的方法，其中抑制了在高温热处理中产生的滑移位错的产生和生长，并且即使在硅单晶晶片的情况下晶片表面层中的缺陷密度也降低 具有大直径为200mm以上的退火晶片。

公开(公告)号：US07147711B2

公开(公告)日：2006-12-12

申请号：US10380818

申请日：2001-09-14

申请人： Masaro Tamatsuka ,  Wei Feig Qu ,  Norihiro Kobayashi

发明人： Masaro Tamatsuka ,  Wei Feig Qu ,  Norihiro Kobayashi

IPC分类号： C30B15/14

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3225

摘要： The present invention provides a method for producing a silicon wafer, which comprises growing a silicon single crystal ingot having a resistivity of 100 Ω·cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma and doped with nitrogen by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to a heat treatment so that a residual interstitial oxygen concentration in the wafer should become 8 ppma or less, and a method for producing a silicon wafer, which comprises growing a silicon single crystal ingot having a resistivity of 100 Ω·cm or more and an initial interstitial oxygen concentration of 8 ppma or less and doped with nitrogen by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to a heat treatment to form an oxide precipitate layer in a bulk portion of the wafer, as well as silicon wafers produced by these production methods. Thus, there is provided a DZ-IG silicon wafer in which a DZ layer of high quality is formed, and which can maintain high resistivity even if the wafer is subjected to a heat treatment for device production.

摘要翻译： 本发明提供一种硅晶片的制造方法，其特征在于，使用Czochralski法生长电阻率为100Ω·cm以上，初始间隙氧浓度为10〜25ppma的硅单晶锭， 将硅单晶锭加工成晶片，并对晶片进行热处理，使得晶片中的残余间隙氧浓度应变为8ppma以下，以及制造硅晶片的方法，其包括生长硅单晶 具有100Ω·cm以上的电阻率和8ppma以下的初始间隙氧浓度并通过切克劳斯基法掺杂氮气的晶体锭，将硅单晶锭加工成晶片，并对晶片进行热处理 以在晶片的主体部分中形成氧化物沉淀层，以及通过这些制造方法制造的硅晶片。 因此，提供了一种DZ-IG硅晶片，其中形成了高质量的DZ层，并且即使对晶片进行用于器件制造的热处理也可以保持高电阻率。

公开(公告)号：US20050172303A1

公开(公告)日：2005-08-04

申请号：US11034438

申请日：2005-01-11

申请人： Yutaka Kudo ,  Futoshi Haga ,  Norihiro Kobayashi

发明人： Yutaka Kudo ,  Futoshi Haga ,  Norihiro Kobayashi

IPC分类号： G06F15/16 ,  G06F9/46 ,  G06F9/50

CPC分类号： G06F9/505 ,  G06F9/5055 ,  G06Q20/204

摘要： An execution multiplicity control system is provided which measures a load distribution over service objects for each case when one type of service requests are inputted into a distributed object system; calculates an effect index for when the execution multiplicity of each of the service objects is varied, based on the load distribution; measures, for each type of the service requests, the number of service requests actually inputted, to acquire a request distribution; calculates and stores a total effect index for when the execution multiplicity of each of the service objects is varied, based on the effect index and the request distribution; and controls the execution multiplicity of the service objects by applying a method of controlling the execution multiplicity of the service objects in descending order of the respective total effect indices calculated.

摘要翻译： 提供执行多重性控制系统，当一种类型的服务请求被输入到分布式对象系统中时，测量每种情况下的服务对象的负载分布; 基于所述负载分布，计算当所述服务对象的执行倍数变化时的效果指标; 针对每种类型的服务请求，实际输入的服务请求的数量，以获取请求分配; 基于效果指标和请求分布，计算并存储当每个服务对象的执行多重性变化时的总效果指数; 并且通过以计算的各个总效应指数的降序应用控制服务对象的执行多重性的方法来控制服务对象的执行多重性。

公开(公告)号：US06805743B2

公开(公告)日：2004-10-19

申请号：US10333970

申请日：2003-01-24

申请人： Norihiro Kobayashi ,  Masaro Tamatsuka ,  Takatoshi Nagoya

发明人： Norihiro Kobayashi ,  Masaro Tamatsuka ,  Takatoshi Nagoya

IPC分类号： C30B2502

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3225

摘要： According to the present invention, there are provided a method for producing a silicon single crystal wafer which contains oxygen induced defects by subjecting a silicon single crystal wafer containing interstitial oxygen to a heat treatment wherein the heat treatment includes at least a step of performing a heat treatment using a resistance-heating type heat treatment furnace and a step of performing a heat treatment using a rapid heating and rapid cooling apparatus, and a silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wafer which has a DZ layer of higher quality compared with a conventional wafer in a wafer surface layer part and has oxygen induced defects at a sufficient density in a bulk part and the silicon single crystal wafer.

摘要翻译： 根据本发明，提供了一种通过对含有间隙氧的硅单晶晶片进行热处理而含有氧诱发缺陷的硅单晶晶片的制造方法，其中，热处理至少包括进行热处理的步骤 使用电阻加热型热处理炉的处理以及使用快速加热和快速冷却装置进行热处理的步骤，以及通过该方法制造的硅单晶晶片。 可以提供一种制造硅单晶晶片的方法，其具有与晶片表面层部分中的常规晶片相比具有更高质量的DZ层，并且在体积部分中具有足够密度的氧诱发缺陷，并且硅单晶 晶圆。