公开(公告)号：US12111716B2

公开(公告)日：2024-10-08

申请号：US18304849

申请日：2023-04-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Mihir Shaileshbhai Doctor ,  Alexander J. Branover ,  Benjamin Tsien ,  Indrani Paul ,  Christopher T. Weaver ,  Thomas J. Gibney ,  Stephen V. Kosonocky ,  John P. Petry

IPC: G06F1/32 ,  G06F1/3234 ,  G06F1/3287 ,  G06F1/3296

CPC classification number: G06F1/3287 ,  G06F1/3265 ,  G06F1/3278 ,  G06F1/3296

Abstract: A processing device and method for efficient transitioning to and from a reduced power state is provided. The processing device comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the plurality of components. The power management controller receives an indication that the plurality of components are idle, executes a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component, and executes a process to exit the component from the reduced power state in response to the component being active.

公开(公告)号：US12086009B2

公开(公告)日：2024-09-10

申请号：US17710521

申请日：2022-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander J. Branover ,  Thomas J. Gibney ,  Mihir Shaileshbhai Doctor ,  Indrani Paul ,  Benjamin Tsien ,  Stephen V. Kosonocky ,  John P. Petry ,  Christopher T. Weaver

IPC: G06F1/32 ,  G06F1/3234

CPC classification number: G06F1/3234

Abstract: Methods and systems are disclosed for transitioning, by a hardware-based controller, a system on a chip (SoC) into different power states. Techniques disclosed include tracking, by the controller, metrics associated with the SoC and transitioning, by the controller, the SoC from a first power state to a second power state based on the tracked metrics. Were the total amount of power that is used by at least a portion of the transition between the first power state to the second power state and a time spent in the second power state is less than the total amount of power that would have been used by remaining in the first power state.

公开(公告)号：US20230099399A1

公开(公告)日：2023-03-30

申请号：US17485199

申请日：2021-09-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander J. Branover ,  Christopher T. Weaver ,  Indrani Paul ,  Benjamin Tsien ,  Mihir Shaileshbhai Doctor ,  Stephen V. Kosonocky ,  John P. Petry ,  Thomas J. Gibney

IPC: G06F1/3296

Abstract: A method and apparatus for managing a controller includes indicating, by a processor of a first device, to the controller of a second device to enter a second power state from a first power state. The controller of the second device responds to the processor of the first device with a confirmation. The processor of the first device transmits a signal to the controller of the second device to enter the second power state. Upon receiving a wake event, the controller of the second device exits the second device from the second power state to the first power state.

公开(公告)号：US20230090567A1

公开(公告)日：2023-03-23

申请号：US17483702

申请日：2021-09-23

Applicant: Advanced Micro Devices, Inc.

Inventor： Benjamin Tsien ,  Alexander J. Branover ,  Indrani Paul ,  Christopher T. Weaver ,  Thomas J. Gibney ,  Stephen V. Kosonocky ,  John P. Petry ,  Mihir Shaileshbhai Doctor

IPC: G06F1/3234

Abstract: Devices and methods for cache prefetching are provided. A device is provided which comprises a quality of service (QOS) component having first assigned registers used to store data to execute a program, a plurality of non-QOS components having second assigned registers used to store data to execute the program and a power management controller, in communication with the QOS component and the non-QOS components. The power management controller is configured to issue fences for the non-QOS components when it is determined that one or more of the non-QOS components are idle, issue a fence for the QOS component when the fences for the non-QOS components are completed and enter a reduced power state when the fences for the non-QOS components and the fence for the QOS component are completed.

公开(公告)号：US20230030985A1

公开(公告)日：2023-02-02

申请号：US17390486

申请日：2021-07-30

Applicant: Advanced Micro Devices, Inc.

Inventor： John P. Petry ,  Alexander J. Branover ,  Benjamin Tsien ,  Christopher T. Weaver ,  Stephen V. Kosonocky ,  Indrani Paul ,  Thomas J. Gibney ,  Mihir Shaileshbhai Doctor

IPC: G06F1/3287

Abstract: A disclosed technique includes triggering a change for a first set of one or more functional elements and for a second set of one or more functional elements from a high-power state to a low-power state; saving first state of the first set of one or more functional elements via a first set of one or more save-state elements; saving second state of the second set of one or more functional elements via a second set of one or more save-state elements; powering down the first set of one or more functional elements and the second set of one or more functional elements; and transmitting the first state and the second state to a memory.

公开(公告)号：US20180172753A1

公开(公告)日：2018-06-21

申请号：US15381992

申请日：2016-12-16

Applicant: Advanced Micro Devices, Inc.

Inventor： Abhay Deshpande ,  Arun S. Iyer ,  Prasanth K. Vallur ,  Girish Anathahally Singrigowda ,  Stephen V. Kosonocky

IPC: G01R31/26 ,  H03K5/159 ,  H03K3/03

CPC classification number: G01R31/2623 ,  H03K3/0315 ,  H03K5/159

Abstract: Various embodiments of a gate oxide breakdown detection technique detect gate oxide degradation due to stress on a per part basis without destroying functional circuits for an intended application. Stress on the gate oxide may be applied while nominal drain currents flow through a device, thereby stressing the device under conditions similar to actual operating conditions. The technique is relatively fast and does not require analog amplifiers or tuning of substantial amounts of other additional circuitry as compared to conventional gate oxide breakdown detection techniques.

公开(公告)号：US20180067535A1

公开(公告)日：2018-03-08

申请号：US15258816

申请日：2016-09-07

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Stephen V. Kosonocky ,  Thomas Burd ,  Adam Clark ,  Larry D. Hewitt ,  John Vincent Faricelli ,  John P. Petry

IPC: G06F1/32 ,  G01R31/28

CPC classification number: G06F1/3209 ,  G01R31/2856 ,  G01R31/2874 ,  G06F1/3206 ,  G06F1/3234 ,  G06F11/008 ,  G06F11/3409

Abstract: A system and method for managing operating modes within a semiconductor chip for optimal power and performance while meeting a reliability target are described. A semiconductor chip includes a functional unit and a corresponding reliability monitor. The functional unit provides actual usage values to the reliability monitor. The reliability monitor determines expected usage values based on a reliability target and the age of the semiconductor chip. The reliability monitor compares the actual usage values and the expected usage values. The result of this comparison is used to increase or decrease current operational parameters.

公开(公告)号：US20160341604A1

公开(公告)日：2016-11-24

申请号：US14716064

申请日：2015-05-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Stephen V. Kosonocky

IPC: G01K7/16 ,  G01K13/00 ,  G01K7/01 ,  H03B5/24

CPC classification number: G01K7/16 ,  G01K7/01 ,  G01K7/32 ,  G01K13/00 ,  H03K3/0231

Abstract: A temperature dependent oscillator charges a capacitance from a voltage source through a switch. The switch is opened and the capacitance discharges through a transistor having a temperature dependent resistance. The voltage across the capacitance is compared to a predetermined threshold voltage. The comparator asserts a compare signal when the capacitance discharges to a predetermined voltage level. The switch is then closed for a long enough time to recharge the capacitor and then the switch is opened to allow the capacitance to discharge through the transistor. The charging and discharging repeats with a frequency that is exponentially related to temperature. A counter counts the oscillations over a predetermined time period. The count value is processed using a natural log function resulting in a thermal value corresponding to temperature. The thermal value may be corrected for supply voltage errors.

Abstract translation: 温度相关的振荡器通过开关从电压源充电电容。 开关断开，电容通过具有温度依赖性电阻的晶体管放电。 将电容两端的电压与预定的阈值电压进行比较。 当电容放电到预定电压电平时，比较器置位一个比较信号。 然后将开关闭合足够长的时间以对电容器充电，然后开关打开以允许电容通过晶体管放电。 充电和放电以与温度呈指数关系的频率重复。 计数器对预定时间段内的振荡进行计数。 使用自然对数函数处理计数值，得到对应于温度的热值。 可以针对电源电压误差校正热值。

公开(公告)号：US10218273B2

公开(公告)日：2019-02-26

申请号：US15632765

申请日：2017-06-26

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Erhan Ergin ,  Dipanjan Sengupta ,  Elsie Lo ,  Stephen V. Kosonocky ,  Sree Rajesh Saha ,  Divya Guruja

IPC: H02M3/158

Abstract: A distributed voltage regulator has switches that function as resistors and are distributed in rows in a grid pattern across a regulated voltage domain. The switches receive an unregulated voltage and supply the regulated voltage. Switch control lines selectively enable the switches to achieve the desired voltage regulation. Droop detect circuits are also distributed through regulated voltage domain. The droop detect circuits detect when the regulated voltage is below a threshold and supply droop detect signals indicative thereof. A plurality of select circuits receive a first group of control lines to configure the switches for charge injection in response to a droop condition and a second group of control lines to configure the switches for other voltage regulation. The select circuits select one of the first and second group of control lines as switch control lines to configure the switches based on the droop detect signals.

公开(公告)号：US20150026531A1

公开(公告)日：2015-01-22

申请号：US13943405

申请日：2013-07-16

Applicant: Advanced Micro Devices, Inc.

Inventor： Stephen V. Kosonocky ,  Grady Giles

IPC: G01R31/3185

CPC classification number: G01R31/318575 ,  G01R31/318547

Abstract: Some embodiments of a power supply monitor include a measurement circuit to measure a voltage provided to the power supply monitor, a comparator to compare the voltage to a predetermined voltage threshold, and an interface to provide, during a scan test of a processing device including the power supply monitor, a fault signal in response to the voltage being below the voltage threshold. Some embodiments of a method include providing a first test pattern to one or more power supply monitors associated with one or more circuit blocks in the processing device and capturing a first result generated by the power supply monitor(s) based on the first test pattern. The first result indicates whether a voltage provided to the circuit block(s) is below a voltage threshold.

Abstract translation: 电源监视器的一些实施例包括用于测量提供给电源监视器的电压的测量电路，用于将电压与预定电压阈值进行比较的比较器以及在包括所述电源监视器的处理设备的扫描测试期间提供的接口 电源监视器，响应于电压低于电压阈值的故障信号。 方法的一些实施例包括向与处理设备中的一个或多个电路块相关联的一个或多个电源监视器提供第一测试图案，并且基于第一测试图案捕获由电源监视器产生的第一结果。 第一结果指示提供给电路块的电压是否低于电压阈值。