Signal transfer function equalization in multi-stage delta-sigma analog-to-digital converters

    公开(公告)号:US09742426B2

    公开(公告)日:2017-08-22

    申请号:US15359240

    申请日:2016-11-22

    Abstract: Typically, complex systems require a separate and expensive equalizer at the output of an analog-to-digital converter (ADC). Rather than providing a separate equalizer, the effective Signal Transfer Function (STF) of a Multi-stAge noise SHaping (MASH) ADC can be modified by leveraging available digital filtering hardware necessary for quantization noise cancellation. The modification can involves adding calculations in the software previously provided for computing digital quantization noise cancellation filter coefficients, where the calculations are added to take into account equalization as well. As a result, the signal transfer function can be modified to meet ADC or system-level signal-chain specifications without additional equalization hardware. The method is especially attractive for high-speed applications where magnitude and phase responses are more challenging to meet.

    Digital measurement of DAC timing mismatch error

    公开(公告)号:US09735797B2

    公开(公告)日:2017-08-15

    申请号:US15360349

    申请日:2016-11-23

    Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

    Mode-matching of MEMS resonators
    3.
    发明授权

    公开(公告)号:US10247600B2

    公开(公告)日:2019-04-02

    申请号:US15348521

    申请日:2016-11-10

    Abstract: Systems and techniques are described for matching the resonance frequencies of multiple resonators. In some embodiments, a resonator generates an output signal reflecting the resonator's response to an input drive signal and an input noise signal. The output signal is then compared to the noise signal to derive a signal representative of the resonance frequency of the resonator. Comparing that signal to the output signal of a second resonator gives an indication of whether there is a difference between the resonance frequencies of the two resonators. If there is, one or both of the resonators may be adjusted. In this manner, the resonance frequencies of resonators may be matched during normal operation of the resonators.

    MODE-MATCHING OF MEMS RESONATORS
    4.
    发明申请

    公开(公告)号:US20180128674A1

    公开(公告)日:2018-05-10

    申请号:US15348521

    申请日:2016-11-10

    Abstract: Systems and techniques are described for matching the resonance frequencies of multiple resonators. In some embodiments, a resonator generates an output signal reflecting the resonator's response to an input drive signal and an input noise signal. The output signal is then compared to the noise signal to derive a signal representative of the resonance frequency of the resonator. Comparing that signal to the output signal of a second resonator gives an indication of whether there is a difference between the resonance frequencies of the two resonators. If there is, one or both of the resonators may be adjusted. In this manner, the resonance frequencies of resonators may be matched during normal operation of the resonators.

    DIGITAL MEASUREMENT OF DAC TIMING MISMATCH ERROR

    公开(公告)号:US20170170839A1

    公开(公告)日:2017-06-15

    申请号:US15360349

    申请日:2016-11-23

    Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

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