Abstract:
In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.
Abstract:
A pair of eyeglasses may include one or more adjustable lenses. An adjustable lens may include electrically modulated optical material such as one or more liquid crystal cells having a phase profile that is adjusted using patterned electrodes. Digital-to-analog converter circuits may provide voltages to the electrodes. To save space on the lens, a smaller number of digital-to-analog converter circuits may provide voltages to a greater number of electrodes by sequentially coupling and decoupling the digital-to-analog converter circuits to different groups of electrodes, advancing from group-to-group with each clock cycle by a number of electrodes that is less than the number of digital-to-analog converter circuits. At least one of the electrodes in each group may be driven at the same voltage for two consecutive clock cycles to avoid erroneous voltages resulting from the parasitic capacitance between adjacent fingers.
Abstract:
The disclosed embodiments provide a system that operates a power supply. During operation, the system disposes a first switching mechanism between a first output of a first power converter and two or more loads. Next, the system obtains two or more error signals for the two or more loads, wherein each error signal from the two or more error signals represents a difference between a load voltage of a load from the two or more loads and a first reference voltage for the load from a first set of reference voltages for driving the two or more loads using the first power converter. The system then uses the first switching mechanism to couple the load with a largest error signal from the two or more error signals to the first output.
Abstract:
Systems and methods for operating a display by dynamically determining a refresh rate for the display. In certain implementations, a processor determines a number of pixels having medium grayscale levels from a histogram for the image. If the number does not exceed a threshold, the processor sets a refresh rate for the display to a first refresh rate. In certain implementations, if the number exceeds a threshold, the processor may set the refresh rate for the display to a second refresh rate. Moreover, the first refresh rate may be lower than the second threshold. In some implementations, the image may be analyzed by subdividing the image into blocks and determining a refresh rate based on grayscale levels or distributions in the blocks. Based on the analysis of the blocks, a corresponding refresh rate may be selected.
Abstract:
The disclosed embodiments provide a system that operates a power supply. During operation, the system obtains power states of two or more loads coupled to two or more power converters in the power supply. Next, the system generates one or more control signals for a set of switching mechanisms to configure a coupling of the two or more loads to the two or more power converters through the switching mechanisms based on the power states.
Abstract:
One gate driver includes an output node configured to be coupled to a gate line and to provide power to the gate line for driving thin-film transistor (TFT) gates of a display. An input node of the gate driver is configured to receive an input signal. The gate driver includes a first field-effect transistor (FET) having a gate, a drain, and a source. The drain may be coupled to the input node and the source may be coupled to the output node. The gate driver also includes a second FET having a gate, a drain, and a source. The drain may be coupled to the input node. The gate driver includes a capacitor having a first end coupled to the gates of the FETs and a second end coupled to the source of the second FET. Using the gate driver power consumption of the display may be reduced.
Abstract:
The disclosed embodiments provide a system that operates a power supply. During operation, the system obtains power states of two or more loads coupled to two or more power converters in the power supply. Next, the system generates one or more control signals for a set of switching mechanisms to configure a coupling of the two or more loads to the two or more power converters through the switching mechanisms based on the power states.
Abstract:
Systems and methods for operating a display by dynamically determining a refresh rate for the display. In certain implementations, a processor determines a number of pixels having medium grayscale levels from a histogram for the image. If the number does not exceed a threshold, the processor sets a refresh rate for the display to a first refresh rate. In certain implementations, if the number exceeds a threshold, the processor may set the refresh rate for the display to a second refresh rate. Moreover, the first refresh rate may be lower than the second threshold. In some implementations, the image may be analyzed by subdividing the image into blocks and determining a refresh rate based on grayscale levels or distributions in the blocks. Based on the analysis of the blocks, a corresponding refresh rate may be selected.
Abstract:
The disclosed embodiments provide a system that operates a power supply. During operation, the system disposes a first switching mechanism between a first output of a first power converter and two or more loads. Next, the system obtains two or more error signals for the two or more loads, wherein each error signal from the two or more error signals represents a difference between a load voltage of a load from the two or more loads and a first reference voltage for the load from a first set of reference voltages for driving the two or more loads using the first power converter. The system then uses the first switching mechanism to couple the load with a largest error signal from the two or more error signals to the first output.
Abstract:
One gate driver includes an output node configured to be coupled to a gate line and to provide power to the gate line for driving thin-film transistor (TFT) gates of a display. An input node of the gate driver is configured to receive an input signal. The gate driver includes a first field-effect transistor (FET) having a gate, a drain, and a source. The drain may be coupled to the input node and the source may be coupled to the output node. The gate driver also includes a second FET having a gate, a drain, and a source. The drain may be coupled to the input node. The gate driver includes a capacitor having a first end coupled to the gates of the FETs and a second end coupled to the source of the second FET. Using the gate driver power consumption of the display may be reduced.