Measurement Systems, Lithographic Apparatus, Device manufacturing Method and a Method of Measuring

    公开(公告)号:US20180173115A1

    公开(公告)日:2018-06-21

    申请号:US15738695

    申请日:2016-05-31

    Inventor: Stoyan NIHTIANOV

    Abstract: A measurement system for measuring a position and/or displacement of an object (40), the measurement system comprising a sensor (20) and a target (45), the sensor comprising an electromagnet (21); a driving circuit (24) configured to drive the electromagnet to generate an alternating magnetic field (AMF); a measuring circuit (25) configured to measure an electrical impedance parameter of the electromagnet; the target being located on a surface (41) of the object that faces the sensor, wherein the target comprises a graphene layer (46), and wherein, in use, when the alternating magnetic field interacts with the target, the alternating magnetic field changes (RMF), altering the electrical impedance parameter of the electromagnet.

    SEMICONDUCTOR DETECTOR AND METHOD OF FABRICATING SAME

    公开(公告)号:US20240136462A1

    公开(公告)日:2024-04-25

    申请号:US18499141

    申请日:2023-10-30

    CPC classification number: H01L31/115 H01J37/244 H01J37/28 H01J2237/2441

    Abstract: The present disclosure describes a detector used in critical dimension scanning electron microscopes (CD-SEM) and review SEM systems. In one embodiment, the detector includes a semiconductor structure having a p-n junction and a hole through which a scanning beam is passed to a target. The detector also includes a top electrode for the p-n junction (e.g., anode or cathode) that provides an active area for detecting electrons or electromagnetic radiation (e.g., backscattering from the target). The top electrode has a doped layer and can also have a buried portion beneath the doped layer to reduce a series resistance of the top electrode without changing the active area. In another embodiment, an isolation structure can be formed in the semiconductor structure near sidewalls of the hole to electrically isolate the active area from the sidewalls. A method for forming the buried portion of the top electrode is also described.

    SEMICONDUCTOR DETECTOR AND METHOD OF FABRICATING SAME

    公开(公告)号:US20240234620A9

    公开(公告)日:2024-07-11

    申请号:US18499141

    申请日:2023-10-31

    CPC classification number: H01L31/115 H01J37/244 H01J37/28 H01J2237/2441

    Abstract: The present disclosure describes a detector used in critical dimension scanning electron microscopes (CD-SEM) and review SEM systems. In one embodiment, the detector includes a semiconductor structure having a p-n junction and a hole through which a scanning beam is passed to a target. The detector also includes a top electrode for the p-n junction (e.g., anode or cathode) that provides an active area for detecting electrons or electromagnetic radiation (e.g., backscattering from the target). The top electrode has a doped layer and can also have a buried portion beneath the doped layer to reduce a series resistance of the top electrode without changing the active area. In another embodiment, an isolation structure can be formed in the semiconductor structure near sidewalls of the hole to electrically isolate the active area from the sidewalls. A method for forming the buried portion of the top electrode is also described.

    SEMICONDUCTOR DETECTOR AND METHOD OF FABRICATING SAME

    公开(公告)号:US20200212246A1

    公开(公告)日:2020-07-02

    申请号:US16703294

    申请日:2019-12-04

    Abstract: The present disclosure describes a detector used in critical dimension scanning electron microscopes (CD-SEM) and review SEM systems. In one embodiment, the detector includes a semiconductor structure having a p-n junction and a hole through which a scanning beam is passed to a target. The detector also includes a top electrode for the p-n junction (e.g., anode or cathode) that provides an active area for detecting electrons or electromagnetic radiation (e.g., backscattering from the target). The top electrode has a doped layer and can also have a buried portion beneath the doped layer to reduce a series resistance of the top electrode without changing the active area. In another embodiment, an isolation structure can be formed in the semiconductor structure near sidewalls of the hole to electrically isolate the active area from the sidewalls. A method for forming the buried portion of the top electrode is also described.

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