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公开(公告)号：US09609610B2
公开(公告)日：2017-03-28
申请号：US14613264
申请日：2015-02-03
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Peter Croy
CPC classification number: H04W56/0015 , H03L7/08 , H03L7/18 , H03L2207/50 , H04J3/0602 , H04J3/0617 , H04J3/0638 , H04J3/0641 , H04J3/0647 , H04J3/065 , H04J3/0658 , H04J3/0679 , H04J3/0688
Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.
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公开(公告)号：US09608754B2
公开(公告)日：2017-03-28
申请号：US14639896
申请日：2015-03-05
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Emerick Vann
CPC classification number: H04J3/0691 , H03L7/0805 , H03L7/0807 , H04J3/0638 , H04J3/0647 , H04J3/12 , H04L7/0008 , H04L7/0337
Abstract: A system may include a transmitting device. The transmitting device may include one or more terminals for receiving a data signal and a first clock signal. A first phase lock loop may lock a phase of an initial periodic signal with a phase of the first clock signal, the first phase lock loop including a divider to generate the initial periodic signal based on the first clock signal. A decimation module may sample the initial periodic signal at a decimated rate of a backplane clock, the backplane clock being asynchronous with a clock that generated the first clock signal. A transmitting data block interface may construct data blocks and provide the data blocks to a receiving device, each of one or more of the data blocks including a portion of the data signal and at least one sample of the initial periodic signal.
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公开(公告)号：US20150180600A1
公开(公告)日：2015-06-25
申请号：US14639896
申请日：2015-03-05
Applicant: AVIAT U.S., INC.
Inventor： Philip Secker , Emerick Vann
CPC classification number: H04J3/0691 , H03L7/0805 , H03L7/0807 , H04J3/0638 , H04J3/0647 , H04J3/12 , H04L7/0008 , H04L7/0337
Abstract: A system may include a transmitting device. The transmitting device may include one or more terminals for receiving a data signal and a first clock signal. A first phase lock loop may lock a phase of an initial periodic signal with a phase of the first clock signal, the first phase lock loop including a divider to generate the initial periodic signal based on the first clock signal. A decimation module may sample the initial periodic signal at a decimated rate of a backplane clock, the backplane clock being asynchronous with a clock that generated the first clock signal. A transmitting data block interface may construct data blocks and provide the data blocks to a receiving device, each of one or more of the data blocks including a portion of the data signal and at least one sample of the initial periodic signal.
Abstract translation: 系统可以包括发送设备。 发送设备可以包括用于接收数据信号和第一时钟信号的一个或多个终端。 第一锁相环可以用第一时钟信号的相位锁定初始周期信号的相位，第一锁相环包括分频器，以基于第一时钟信号产生初始周期信号。 抽取模块可以以背板时钟的抽取速率对初始周期信号进行采样，背板时钟与产生第一时钟信号的时钟异步。 发送数据块接口可以构造数据块并将数据块提供给接收装置，所述数据块中的一个或多个数据块中的每一个包括数据信号的一部分和初始周期信号的至少一个样本。
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Patent Agency Ranking
公开(公告)号：US09014215B2
公开(公告)日：2015-04-21
申请号：US13625761
申请日：2012-09-24
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Emerick Vann
CPC classification number: H04J3/0691 , H03L7/0805 , H03L7/0807 , H04J3/0638 , H04J3/0647 , H04J3/12 , H04L7/0008 , H04L7/0337
Abstract: A terminal of an exemplary transmitting device is configured to receive an initial clock signal. A first phase lock loop is configured to lock a phase of an initial periodic signal with a phase of the initial clock signal. A transmitting data block interface is configured to provide the plurality of data blocks with samples of the initial periodic signal to a receiving device. An exemplary receiving device includes a receiving data block interface configured to receive the plurality of data blocks. A second phase lock loop is configured to recreate the initial periodic signal and lock a phase of the recreated periodic signal with a phase of the samples of the initial periodic signal. The clock signal generator is configured to recreate and provide the initial clock signal. The recreated clock signal is synchronized to the initial clock signal based on the phase of the recreated periodic signal.
Abstract translation: 示例性发送设备的终端被配置为接收初始时钟信号。 第一锁相环被配置为用初始时钟信号的相位锁定初始周期信号的相位。 发送数据块接口被配置为向接收设备提供多个数据块与初始周期信号的采样。 示例性接收设备包括被配置为接收多个数据块的接收数据块接口。 第二锁相环配置成重新创建初始周期信号，并用初始周期信号的样本的相位来锁定重新创建的周期信号的相位。 时钟信号发生器被配置为重建并提供初始时钟信号。 重新创建的时钟信号基于重新创建的周期信号的相位与初始时钟信号同步。
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公开(公告)号：US20130100967A1
公开(公告)日：2013-04-25
申请号：US13625761
申请日：2012-09-24
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Emerick Vann
IPC: H04J3/06
CPC classification number: H04J3/0691 , H03L7/0805 , H03L7/0807 , H04J3/0638 , H04J3/0647 , H04J3/12 , H04L7/0008 , H04L7/0337
Abstract: A terminal of an exemplary transmitting device is configured to receive an initial clock signal. A first phase lock loop is configured to lock a phase of an initial periodic signal with a phase of the initial clock signal. A transmitting data block interface is configured to provide the plurality of data blocks with samples of the initial periodic signal to a receiving device. An exemplary receiving device includes a receiving data block interface configured to receive the plurality of data blocks. A second phase lock loop is configured to recreate the initial periodic signal and lock a phase of the recreated periodic signal with a phase of the samples of the initial periodic signal. The clock signal generator is configured to recreate and provide the initial clock signal. The recreated clock signal is synchronized to the initial clock signal based on the phase of the recreated periodic signal.
Abstract translation: 示例性发送设备的终端被配置为接收初始时钟信号。 第一锁相环被配置为用初始时钟信号的相位锁定初始周期信号的相位。 发送数据块接口被配置为向接收设备提供多个数据块与初始周期信号的采样。 示例性接收设备包括被配置为接收多个数据块的接收数据块接口。 第二锁相环配置成重新创建初始周期信号，并用初始周期信号的样本的相位来锁定重新创建的周期信号的相位。 时钟信号发生器被配置为重建并提供初始时钟信号。 重新创建的时钟信号基于重新创建的周期信号的相位与初始时钟信号同步。
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公开(公告)号：US20150156741A1
公开(公告)日：2015-06-04
申请号：US14613264
申请日：2015-02-03
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Peter Croy
CPC classification number: H04W56/0015 , H03L7/08 , H03L7/18 , H03L2207/50 , H04J3/0602 , H04J3/0617 , H04J3/0638 , H04J3/0641 , H04J3/0647 , H04J3/065 , H04J3/0658 , H04J3/0679 , H04J3/0688
Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.
Abstract translation: 在一些实施例中，系统包括时钟，根节点，无线电信道网络以及第一和第二子节点。 时钟可以被配置为产生时钟信号。 根节点可以被配置为生成包括第一有效载荷和第一开销的第一帧，并且生成包括第二有效载荷和第二开销的第二帧。 第一和第二开销可以包括基于时钟信号的同步值。 无线电信道网络可以与根节点进行通信，用于发送第一和第二帧。 每个第一和第二子节点可以被配置为执行包括使用同步值的频率同步的时钟恢复和相应的锁相环。
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公开(公告)号：US08983015B2
公开(公告)日：2015-03-17
申请号：US14060503
申请日：2013-10-22
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Peter Croy
CPC classification number: H04W56/0015 , H03L7/08 , H03L7/18 , H03L2207/50 , H04J3/0602 , H04J3/0617 , H04J3/0638 , H04J3/0641 , H04J3/0647 , H04J3/065 , H04J3/0658 , H04J3/0679 , H04J3/0688
Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.
Abstract translation: 在一些实施例中，系统包括时钟，根节点，无线电信道网络以及第一和第二子节点。 时钟可以被配置为产生时钟信号。 根节点可以被配置为生成包括第一有效载荷和第一开销的第一帧，并且生成包括第二有效载荷和第二开销的第二帧。 第一和第二开销可以包括基于时钟信号的同步值。 无线电信道网络可以与根节点进行通信，用于发送第一和第二帧。 每个第一和第二子节点可以被配置为执行包括使用同步值的频率同步的时钟恢复和相应的锁相环。
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公开(公告)号：US20140086375A1
公开(公告)日：2014-03-27
申请号：US14060503
申请日：2013-10-22
Applicant: Aviat U.S., Inc.
Inventor： Philip Secker , Peter Croy
IPC: H04J3/06
CPC classification number: H04W56/0015 , H03L7/08 , H03L7/18 , H03L2207/50 , H04J3/0602 , H04J3/0617 , H04J3/0638 , H04J3/0641 , H04J3/0647 , H04J3/065 , H04J3/0658 , H04J3/0679 , H04J3/0688
Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.
Abstract translation: 在一些实施例中，系统包括时钟，根节点，无线电信道网络以及第一和第二子节点。 时钟可以被配置为产生时钟信号。 根节点可以被配置为生成包括第一有效载荷和第一开销的第一帧，并且生成包括第二有效载荷和第二开销的第二帧。 第一和第二开销可以包括基于时钟信号的同步值。 无线电信道网络可以与根节点进行通信，用于发送第一和第二帧。 每个第一和第二子节点可以被配置为执行包括使用同步值的频率同步的时钟恢复和相应的锁相环。
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