公开(公告)号：US11543877B2

公开(公告)日：2023-01-03

申请号：US17219097

申请日：2021-03-31

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Karthik Rao ,  Indrani Paul ,  Donny Yi ,  Oleksandr Khodorkovsky ,  Leonardo De Paula Rosa Piga ,  Wonje Choi ,  Dana G. Lewis ,  Sriram Sambamurthy

IPC: G06F1/32 ,  G06F1/3287

Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.

公开(公告)号：US20240192760A1

公开(公告)日：2024-06-13

申请号：US18080582

申请日：2022-12-13

Applicant: Advanced Micro Devices, Inc.

Inventor： Donny Yi ,  Karthik Rao

IPC: G06F1/3296

CPC classification number: G06F1/3296

Abstract: A disclosed technique includes in response to a trigger to power a functional element of a device to a lower power state, operating a set of backup state elements for the functional element in a lower power mode; and resuming operation of the functional element and the backup state elements in a higher power state.

公开(公告)号：US12130692B2

公开(公告)日：2024-10-29

申请号：US17993562

申请日：2022-11-23

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Karthik Rao ,  Indrani Paul ,  Donny Yi ,  Oleksandr Khodorkovsky ,  Leonardo De Paula Rosa Piga ,  Wonje Choi ,  Dana G. Lewis ,  Sriram Sambamurthy

IPC: G06F1/32 ,  G06F1/3287

CPC classification number: G06F1/3287

Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.

公开(公告)号：US20230418664A1

公开(公告)日：2023-12-28

申请号：US17846593

申请日：2022-06-22

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Donny Yi ,  Indrani Paul ,  Ashwini Chandrashekhara Holla

IPC: G06F9/48 ,  G06F9/38 ,  G06F9/50 ,  G06F9/30

CPC classification number: G06F9/4881 ,  G06F9/3836 ,  G06F9/5038 ,  G06F9/5044 ,  G06F9/30079

Abstract: An apparatus and method for efficiently scheduling tasks in a dynamic manner to multiple cores that support a heterogeneous computing architecture. A computing system includes multiple cores with at least two cores being capable of executing instructions of a same instruction set architecture (ISA), and therefore, are architecturally compatible. In an implementation, each of the at least two cores is a general-purpose central processing unit (CPU) core capable of executing instructions of a same ISA. However, the throughput and the power consumption greatly differ between the at least two cores based on their hardware designs. An operating system scheduler assigns a thread to a first core, and the first core measures thread dynamic behavior of the thread over a time interval. Based on the thread dynamic behavior, the scheduler reassigns the thread to a second core different from the first core.