Integrated circuit product customizations for identification code visibility

    公开(公告)号:US11315883B2

    公开(公告)日:2022-04-26

    申请号:US16680978

    申请日:2019-11-12

    Abstract: An apparatus includes a substrate including an identification code on a first side of the substrate and near a perimeter of the substrate. The apparatus includes a stiffener structure attached to the first side of the substrate. The stiffener structure has a cutout in an outer perimeter of the stiffener structure. The stiffener structure is oriented with respect to the substrate to cause the cutout to expose the identification code. The cutout may have a first dimension and a second dimension orthogonal to the first dimension. The first dimension may exceed a corresponding first dimension of the identification code and the second dimension may exceed a corresponding second dimension of the identification code, thereby forming a void region between the identification code and edges of the stiffener structure.

    INTEGRATED CIRCUIT PRODUCT CUSTOMIZATIONS FOR IDENTIFICATION CODE VISIBILITY

    公开(公告)号:US20210143104A1

    公开(公告)日:2021-05-13

    申请号:US16680978

    申请日:2019-11-12

    Abstract: An apparatus includes a substrate including an identification code on a first side of the substrate and near a perimeter of the substrate. The apparatus includes a stiffener structure attached to the first side of the substrate. The stiffener structure has a cutout in an outer perimeter of the stiffener structure. The stiffener structure is oriented with respect to the substrate to cause the cutout to expose the identification code. The cutout may have a first dimension and a second dimension orthogonal to the first dimension. The first dimension may exceed a corresponding first dimension of the identification code and the second dimension may exceed a corresponding second dimension of the identification code, thereby forming a void region between the identification code and edges of the stiffener structure.

    Semiconductor chip with patterned underbump metallization and polymer film

    公开(公告)号:US11335659B2

    公开(公告)日:2022-05-17

    申请号:US15395859

    申请日:2016-12-30

    Abstract: Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes forming a first underbump metallization layer on a semiconductor chip is provided. The first underbump metallization layer has a hub, a first portion extending laterally from the hub, and a spoke connecting the hub to the first portion. A polymer layer is applied to the first underbump metallization layer. The polymer layer includes a first opening in alignment with the hub and a second opening in alignment with the spoke. A portion of the spoke is removed via the second opening to sever the connection between the hub and the first portion.

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