公开(公告)号：US11588470B2

公开(公告)日：2023-02-21

申请号：US16794112

申请日：2020-02-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Ching-Han Huang ,  Kuo-Hua Lai ,  Hui-Chung Liu

IPC: H03L1/04 ,  H03H9/10 ,  H03H9/24 ,  H03H3/007 ,  H03H9/08 ,  H03H9/05 ,  H03L1/02

Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.

公开(公告)号：US11296651B2

公开(公告)日：2022-04-05

申请号：US17074618

申请日：2020-10-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Ching-Han Huang ,  Hui-Chung Liu ,  Kuo-Hua Lai ,  Cheng-Ling Huang

IPC: H03B5/04 ,  H01L23/13 ,  H01L23/00 ,  H01L23/36 ,  H03B5/30 ,  H01L23/14 ,  B81B7/00 ,  H03B5/36 ,  H03L1/04 ,  H03B1/02

Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.

公开(公告)号：US11088054B2

公开(公告)日：2021-08-10

申请号：US16570841

申请日：2019-09-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Ying-Chung Chen ,  Hui-Chung Liu

IPC: H01L21/48 ,  H01L23/495

Abstract: A lead frame includes a die pad having a pad top surface and a pad bottom surface opposite to the top pad surface, a plurality of leads, each having a top lead surface and a bottom lead surface opposite to the top lead surface and disposed around the die pad, and a first molding compound disposed between the die pad and each of the leads. The first molding compound exposes the top pad surface of the die pad by covering a portion of the periphery of the top pad surface of the die pad. A method for manufacturing the lead frame is also disclosed.

公开(公告)号：US12184266B2

公开(公告)日：2024-12-31

申请号：US18112464

申请日：2023-02-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Ching-Han Huang ,  Kuo-Hua Lai ,  Hui-Chung Liu

IPC: H03L1/04 ,  H03H3/007 ,  H03H9/05 ,  H03H9/08 ,  H03H9/10 ,  H03H9/24 ,  H03L1/02

Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.

公开(公告)号：US10812017B1

公开(公告)日：2020-10-20

申请号：US16530710

申请日：2019-08-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Ching-Han Huang ,  Hui-Chung Liu ,  Kuo-Hua Lai ,  Cheng-Ling Huang

IPC: H03B5/04 ,  H01L23/13 ,  H01L23/00 ,  H01L23/36 ,  H03B5/30 ,  H01L23/14 ,  B81B7/00 ,  H03B5/36 ,  H03L1/04 ,  H03B1/02

Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.

公开(公告)号：US11817397B2

公开(公告)日：2023-11-14

申请号：US17129641

申请日：2020-12-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Hui-Chung Liu ,  Yu-Che Huang

IPC: H01L23/00 ,  H01L23/538 ,  H01L21/50 ,  G01L1/26 ,  H01R12/61 ,  H01L21/60

CPC classification number: H01L23/562 ,  G01L1/26 ,  H01L21/50 ,  H01L23/5387 ,  H01L24/80 ,  H01R12/61 ,  H01L2021/60135

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.

公开(公告)号：US11527671B2

公开(公告)日：2022-12-13

申请号：US16732161

申请日：2019-12-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Hui-Chung Liu ,  Ching-Han Huang

IPC: H01L31/12 ,  H01L31/18 ,  H01L31/153

Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.

公开(公告)号：US11217499B2

公开(公告)日：2022-01-04

申请号：US16448970

申请日：2019-06-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Hui-Chung Liu

IPC: H01L23/31 ,  B81B7/00 ,  H01L23/10 ,  B06B1/06 ,  H01L21/56 ,  B81C1/00

Abstract: A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.