公开(公告)号：US10037974B2

公开(公告)日：2018-07-31

申请号：US15416907

申请日：2017-01-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien Lin Chang Chien ,  Chang Chi Lee ,  Chin-Li Kao ,  Dao-Long Chen ,  Ta-Chien Cheng

IPC: H01L25/065 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/367 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3672 ,  H01L24/16 ,  H01L24/33 ,  H01L24/81 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device package includes a package substrate, a first electronic device, a second electronic device and a first molding layer. The package substrate includes a first surface, a second surface opposite to the first surface, and an edge. The first electronic device is positioned over and electrically connected to the package substrate through the first surface. The second electronic device is positioned over and electrically connected to the first electronic device. The first molding layer is positioned over the package substrate, and the first molding layer encapsulates a portion of the first surface and the edge of the package substrate.