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    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20070269955A2

    公开(公告)日：2007-11-22

    申请号：US11531610

    申请日：2006-09-13

    申请人： Ichiro YAMAMOTO

    发明人： Ichiro YAMAMOTO

    IPC分类号： H01L21/20

    CPC分类号： H01L28/40 ,  H01L21/3142 ,  H01L21/31616 ,  H01L21/31641 ,  H01L27/10811 ,  H01L27/10814 ,  H01L27/10852

    摘要： A semiconductor device is provided which has a capacitor insulating film made up of zirconium aliminate being an amorphous film obtained by having crystalline dielectric contain amorphous aluminum oxide and having its composition of AlXZr(1-X)OY (0.05≦X≦0.3), hereby being capable of preventing, in a process of forming a capacitor of MIM (Metal Insulator Metal) structure, dielectric breakdown of a capacitor insulating film while a relative dielectric constant of a metal oxide film used as the capacitor insulating film is kept high.

    摘要翻译： 提供了一种半导体器件，其具有由锆合金制成的电容器绝缘膜，其是通过具有包含无定形氧化铝并且其组成为Al x Zr（1- （0.05 <= X <= 0.3），因此在形成MIM（金属绝缘体金属）结构的电容器的工艺中能够防止介电击穿 电容绝缘膜，而用作电容器绝缘膜的金属氧化物膜的相对介电常数保持较高。

    MOTHERBOARD, INFORMATION PROCESSOR, SETTING METHOD AND COMPUTER-READABLE RECORDING MEDIUM IN WHICH SETTING PROGRAM IS STORED
    5.
    发明申请
    MOTHERBOARD, INFORMATION PROCESSOR, SETTING METHOD AND COMPUTER-READABLE RECORDING MEDIUM IN WHICH SETTING PROGRAM IS STORED 审中-公开
    主板，信息处理器，设置方案和计算机可读记录介质在设置程序存储

    公开(公告)号：US20080256350A1

    公开(公告)日：2008-10-16

    申请号：US12021695

    申请日：2008-01-29

    申请人： Taisuke HATTORI ,  Ichiro YAMAMOTO ,  Atsushi KOBAYASHI

    发明人： Taisuke HATTORI ,  Ichiro YAMAMOTO ,  Atsushi KOBAYASHI

    IPC分类号： G06F15/177

    CPC分类号： G06F13/409 ,  G06F8/654

    摘要： A motherboard can be installed commonly in each of a plurality of electronic devices of various types different in configuration without modifying the BIOS setting by comprising a setting information retaining section retaining setting information for a setting process for each electronic device; a specification information obtaining section obtaining specification information for specifying the type of each electronic device; a modifying information retaining section retaining modification information for modifying the setting information according to the type of each electronic device; a setting information modifying section modifying, on the basis of the specification information and the modification information retained, the setting information according to the type of the device in which the motherboard is installed; and a setting process performing section for performing the setting process for the device on the basis of the modified setting information.

    摘要翻译： 主板可以通常配置在各种不同类型的电子设备中的每一个中，而不需要修改BIOS设置，包括设置信息保持部分，保留用于每个电子设备的设置过程的设置信息; 指定信息获取部获取用于指定每个电子设备的类型的指定信息; 修改信息保留部分，保存根据每个电子设备的类型修改设置信息的修改信息; 设置信息修改部分，根据所述指定信息和所保留的修改信息修改根据安装所述主板的设备的类型的设置信息; 以及设置处理执行部分，用于基于修改的设置信息执行针对该设备的设置处理。

    Method of manufacturing a semiconductor device
    6.
    发明申请
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US20120028455A1

    公开(公告)日：2012-02-02

    申请号：US13067788

    申请日：2011-06-27

    申请人： Naomi FUKUMAKI ,  Eiji HASEGAWA ,  Toshihiro IIZUKA ,  Ichiro YAMAMOTO

    发明人： Naomi FUKUMAKI ,  Eiji HASEGAWA ,  Toshihiro IIZUKA ,  Ichiro YAMAMOTO

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823857 ,  H01L21/823842

    摘要： A method of manufacturing a semiconductor device having a p-type field effect transistor and an n-type field effect transistor includes the steps of: forming an interface insulating layer and a high-permittivity layer on a substrate in the stated order; forming a pattern of a sacrifice layer on the high-permittivity layer; forming a metal-containing film containing metal elements therein on the high-permittivity layer in a first region where the sacrifice layer is formed and a second region where no sacrifice layer is formed; introducing the metal elements into an interface between the interface insulating layer and the high-permittivity layer in the second region by conducting a heat treatment; and removing the sacrifice layer by wet etching, wherein in the removing step, the sacrifice layer is etched easily more than the high-permittivity layer. With this configuration, the semiconductor device excellent in reliability is obtained.

    摘要翻译： 制造具有p型场效应晶体管和n型场效应晶体管的半导体器件的方法包括以下步骤：按照所述顺序在衬底上形成界面绝缘层和高电容率层; 在高电介质层上形成牺牲层的图案; 在形成有牺牲层的第一区域和形成牺牲层的第二区域的高介电常数层上形成含有金属元素的含金属膜; 通过进行热处理，将金属元素引入第二区域中的界面绝缘层与高电容率层之间的界面; 并且通过湿法蚀刻去除牺牲层，其中在去除步骤中，牺牲层比高介电常数层容易蚀刻。 由此，能够获得可靠性优异的半导体装置。

    APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    7.
    发明申请
    APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的装置及制造半导体器件的方法

    公开(公告)号：US20090263976A1

    公开(公告)日：2009-10-22

    申请号：US12472118

    申请日：2009-05-26

    申请人： Ichiro YAMAMOTO ,  Koji WATANABE

    发明人： Ichiro YAMAMOTO ,  Koji WATANABE

    IPC分类号： H01L21/46

    CPC分类号： C23C16/56 ,  C23C16/401 ,  C23C16/44

    摘要： Variation in the thickness of the deposited films depending on number of the processed product wafers in the deposition process employing a batch type CVD apparatus is inhibited to provide a manufacture of the film having a predetermined thickness with an improved reproducibility. The deposition apparatus 100 comprises a deposition reactor 101 that is capable of containing product wafers 107 and dummy wafers 109, boat 105, on which product wafer 107 or the dummy wafer 109 is mounted, and a heater 111 provided outside of the deposition reactor 101 along a reactor wall 103. Further, the deposition apparatus 100 comprises a gas supplying system including a high-k source material supplying line 113 and SiO2 source material supplying line 115, and a controller 121 that provides a control to the supply of a gas from the gas supplying system to the deposition reactor 101.

    摘要翻译： 根据使用间歇型CVD装置的沉积工艺中的加工产品晶片的数量，沉积膜厚度的变化被抑制，从而提供具有预定厚度的膜，并且具有改进的再现性。 沉积设备100包括能够容纳产品晶片107和虚设晶片109，安装有产品晶片107或虚设晶片109的船105的沉积反应器101和沿着沉积反应器101的外部设置的加热器111 反应器壁103.此外，沉积设备100包括包括高k源材料供应管线113和SiO2源材料供应管线115的气体供应系统，以及控制器121，其提供对来自 气体供给系统到沉积反应器101。