SAR analog-to-digital converter having variable currents for low power mode of operation
    1.
    发明授权
    SAR analog-to-digital converter having variable currents for low power mode of operation 失效
    具有可变电流的SAR模数转换器,用于低功耗操作模式

    公开(公告)号:US07821441B2

    公开(公告)日:2010-10-26

    申请号:US12339757

    申请日:2008-12-19

    IPC分类号: H03M1/34

    CPC分类号: H03M1/002 H03M1/462

    摘要: A successive approximation analog-to-digital converter includes a capacitor array having a plurality of switch capacitors therein with varying weights, each having a common plate connected to a common node and a switched plate. A SAR controller samples an input voltage on said capacitor array in a sampling phase and redistributes the charge stored therein in a conversion phase by selectively increasing the voltage on select capacitors of the capacitor array in accordance with a SAR conversion algorithm. Circuitry controls the sampling of the input voltage by the capacitor array and is responsive to at least one applied bias current. The at least one applied bias current operates at a first level responsive to a first mode of operation of the SAR ADC and operates at a second level responsive to a second mode of operation of the SAR ADC.

    摘要翻译: 逐次逼近模数转换器包括其中具有多个重量变化的开关电容器的电容器阵列,每个开关电容器具有连接到公共节点和开关板的公共板。 SAR控制器以采样相位对所述电容器阵列上的输入电压进行采样,并且通过根据SAR转换算法选择性地增加电容器阵列的选择电容器上的电压来重新分配存储在转换阶段的电荷。 电路控制电容器阵列对输入电压的采样,并响应至少一个施加的偏置电流。 响应于SAR ADC的第一工作模式,至少一个施加的偏置电流工作在第一电平,并响应于SAR ADC的第二工作模式而工作在第二电平。

    SAR analog-to-digital converter having differing bit modes of operation
    2.
    发明授权
    SAR analog-to-digital converter having differing bit modes of operation 有权
    具有不同位操作模式的SAR模数转换器

    公开(公告)号:US07956787B2

    公开(公告)日:2011-06-07

    申请号:US12339751

    申请日:2008-12-19

    IPC分类号: H03M1/12

    摘要: A method for operating an N-bit SAR ADC as a greater than N-bit resolution SAR ADC includes the steps of taking a plurality of samples for each analog value being converted to a digital value by the SAR ADC. A portion of an LSB is added to all but one of the plurality of samples. The plurality of samples are then accumulated and output as a digital value. The digital value has a resolution greater than the N-bit resolution of the SAR ADC.

    摘要翻译: 用于将N位SAR ADC操作为大于N位分辨率SAR ADC的方法包括以下步骤:对于通过SAR ADC将每个模拟值转换为数字值的多个样本。 LSB的一部分被添加到多个样本中的除一个之外的所有样本。 然后将多个样本累积并作为数字值输出。 数字值的分辨率大于SAR ADC的N位分辨率。

    High gain integrated antenna and devices therefrom
    3.
    发明授权
    High gain integrated antenna and devices therefrom 失效
    高增益集成天线及其装置

    公开(公告)号:US06842144B2

    公开(公告)日:2005-01-11

    申请号:US10458645

    申请日:2003-06-10

    IPC分类号: H01Q1/02 H01Q1/38 H01Q9/28

    CPC分类号: H01Q1/02 H01Q1/38 H01Q9/28

    摘要: An integrated circuit for wireless communications includes substrate, at least one integrated antenna formed in or on the substrate, and a heat sink. At least one dielectric propagating layer is disposed between the integrated antenna and the heat sink which provides a thermal conductivity of at least 35 W/m·K and resistivity greater than 100 Ohm-cm at 25 C. The invention can be used to establish an on-chip or inter-chip wireless link over at least a 2.2 cm distance.

    摘要翻译: 一种用于无线通信的集成电路包括衬底,形成在衬底中或衬底上的至少一个集成天线和散热器。 在集成天线和散热器之间设置至少一个介电传播层,其在25℃下提供至少35W / mK的导热率和大于100欧姆 - 厘米的电阻率。本发明可用于建立 芯片或芯片间无线连接至少2.2厘米的距离。

    Low power retention flip-flops
    4.
    发明授权
    Low power retention flip-flops 有权
    低功率保持触发器

    公开(公告)号:US07908500B2

    公开(公告)日:2011-03-15

    申请号:US11865661

    申请日:2007-10-01

    IPC分类号: G06F1/00

    摘要: A microcontroller includes a processing unit having a processing unit having normal power mode of operation and a low power mode of operation. The processing unit further having digital circuitry connected to the processing unit having a plurality of logic circuits associated therewith for processing digital values. A plurality of retention flip-flops are associated with the digital circuitry for storing a logical state of at least one or more of the logic circuits within the digital circuitry when the processing unit enters the low power mode of operation. The plurality of retention flip flops include a first type of transistors for operating in both the low and high power modes of operation and a second type of transistors for operation only in the normal mode of operation and wherein substantially the remainder of the digital circuitry in the processing unit comprises the second type of transistors.

    摘要翻译: 微控制器包括具有处理单元的处理单元,该处理单元具有正常的功率操作模式和低功率操作模式。 处理单元还具有连接到处理单元的数字电路,其具有与其相关联的多个逻辑电路以处理数字值。 当处理单元进入低功率操作模式时,多个保持触发器与数字电路相关联,用于存储数字电路内的至少一个或多个逻辑电路的逻辑状态。 多个保持触发器包括用于在低功率和高功率工作模式下操作的第一类型的晶体管,以及用于仅在正常操作模式下操作的第二类型的晶体管,并且其中基本上在其中的数字电路的其余部分 处理单元包括第二类型的晶体管。

    System and method for calibrating bias current for low power RTC oscillator
    5.
    发明授权
    System and method for calibrating bias current for low power RTC oscillator 有权
    用于校准低功耗RTC振荡器的偏置电流的系统和方法

    公开(公告)号:US07714674B2

    公开(公告)日:2010-05-11

    申请号:US11967372

    申请日:2007-12-31

    IPC分类号: H03L1/00

    CPC分类号: H03L1/02

    摘要: The integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A real time clock circuit provides a system clock for the processing core. The real time clock further comprises an internal oscillator that generates the system clock for the integrated circuit package. The internal oscillator has a factory calibrated bias current. An internal oscillator control register controls the operation of the internal oscillator responsive to control bits of the programmable load capacitor array controlled by the processing core.

    摘要翻译: 集成电路封装包括用于对一组指令进行操作以执行预定义的处理的处理核心。 实时时钟电路为处理核心提供系统时钟。 实时时钟还包括产生用于集成电路封装的系统时钟的内部振荡器。 内部振荡器具有出厂校准的偏置电流。 响应于由处理核心控制的可编程负载电容阵列的控制位,内部振荡器控制寄存器控制内部振荡器的操作。

    Microcontroller unit having power supply voltage monitor
    6.
    发明授权
    Microcontroller unit having power supply voltage monitor 有权
    具有电源电压监视器的微控制器单元

    公开(公告)号:US07873856B2

    公开(公告)日:2011-01-18

    申请号:US11967389

    申请日:2007-12-31

    IPC分类号: G06F1/00 G05F3/02

    CPC分类号: H03K17/22 H03K17/223

    摘要: The single chip microcontroller unit includes a processing unit having normal power mode of operation and a low power mode of operation. Analog circuitry and digital circuitry are connected to the processing unit. Monitoring circuitry determines if a chip supply voltage level exceeds a threshold level necessary to maintain operation of the digital circuitry.

    摘要翻译: 单片微控制器单元包括具有正常功率操作模式和低功率操作模式的处理单元。 模拟电路和数字电路连接到处理单元。 监控电路确定芯片电源电压电平是否超过维持数字电路运行所需的阈值电平。

    System for monitoring power supply voltage
    7.
    发明授权
    System for monitoring power supply voltage 有权
    用于监控电源电压的系统

    公开(公告)号:US07873854B2

    公开(公告)日:2011-01-18

    申请号:US11865654

    申请日:2007-10-01

    IPC分类号: G06F1/00

    CPC分类号: H03K17/22 H03K17/223

    摘要: The single chip microcontroller unit includes a processing unit having normal power mode of operation and a low power mode of operation. Analog circuitry and digital circuitry are connected to the processing unit. A power management unit controls power operations of the processing unit, the analog circuitry and the digital circuitry. Power monitoring circuitry provides power control signals to the power management unit. The power monitoring circuitry further includes a system voltage monitoring circuit for generating a system voltage control signal responsive to a system voltage level with respect to a predetermined level. The power monitoring circuitry also includes a supply monitoring circuit for determining if a chip supply voltage level exceeds a threshold level.

    摘要翻译: 单片微控制器单元包括具有正常功率操作模式和低功率操作模式的处理单元。 模拟电路和数字电路连接到处理单元。 电源管理单元控制处理单元,模拟电路和数字电路的功率操作。 电源监控电路向电源管理单元提供电源控制信号。 功率监测电路还包括系统电压监测电路,用于响应于相对于预定电平的系统电压电平来产生系统电压控制信号。 功率监视电路还包括用于确定芯片电源电压电平是否超过阈值电平的电源监控电路。